STEVAL-MKI109V1 STMicroelectronics, STEVAL-MKI109V1 Datasheet - Page 50

• Manufacturer Part Number: STEVAL-MKI109V1
• Description: MOTEHRBOARD MEMS ADAPTER STM32
• Manufacturer: STMicroelectronics
• Series: MEMSr

Specifications of STEVAL-MKI109V1

• Main Purpose: Motherboard; Accelerometer, Gyroscope
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: STM32 and MEMS Demo Boards
• Primary Attributes: DIL24 Socket for ST MEMS Adapter Boards
• Secondary Attributes: 3 V on-board linear voltage regulator
• Sensing Axis: Triple Axis
• Operating Voltage: 5 V
• Operating Current: 0.68 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: LIS344ALH
• Other names: 497-10682

Electrical characteristics
5.3.13
50/69
Figure 20. I/O AC characteristics definition
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 36.
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
Figure 21. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
V
V
V
V
V
NF(NRST)
IH(NRST)
Symbol
IL(NRST)
F(NRST)
to the series resistance must be minimum
Table
hys(NRST)
R
8.
PU
36. Otherwise the reset will not be taken into account by the device.
(1)
(1)
(1)
PU
(1)
External
reset circuit
NRST pin characteristics
(see
EXT ERNAL
OUTPUT
ON 50pF
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
Maximum frequency is achieved if (t r + t f ) 2/3)T and if the duty cycle is (45-55%)
Table
(1)
0.1 µF
33).
Parameter
t r(I O)out
NRST
Doc ID 15056 Rev 3
(2)
(~10% order)
10%
V DD
50%
when loaded by 50pF
R PU
90%
(2)
.
DD
Conditions
supply voltage conditions summarized in
V
T
IN
10%
Table 36

V
50%
SS
Filter
90%
t r(I O)out
STM32F102x8, STM32F102xB
STM32F10xxx
–0.5
are derived from tests
IL(NRST)
Min
300
30
Internal Reset
2
max level specified in
Typ
200
40
V
DD
ai14132c
Max
100
0.8
50
+0.5
ai14131
Unit
mV
k
ns
ns
V