AS5030 AB austriamicrosystems, AS5030 AB Datasheet - Page 26

BOARD ADAPTER AS5030

AS5030 AB

Manufacturer Part Number
AS5030 AB
Description
BOARD ADAPTER AS5030
Manufacturer
austriamicrosystems
Datasheets

Specifications of AS5030 AB

Sensor Type
Magnetic, Rotary Position
Sensing Range
360°
Interface
Serial
Voltage - Supply
5V
Embedded
No
Utilized Ic / Part
AS5030
Lead Free Status / RoHS Status
Lead free by exemption / RoHS compliant by exemption
Sensitivity
-
AS5030
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
8.3 OTP Programming Connection
Programming of the AS5030 OTP memory does not require a dedicated programming hardware. The programming can be simply accomplished
over the serial 3-wire interface
For permanent programming (command PROG OTP, #19
(PROG).
For temporary OTP write (“soft write”; command WRITE OTP, #1F
To secure unintentional programming, any modification of the OTP memory is only enabled after a special password (command #10
sent to the AS5030.
Figure 22. OTP Programming Connection
8.3.1 Programming in Daisy Chain Mode
Programming in Daisy chain mode is possible for both 3-wire and 2-wire mode (see
write), no additional connections are required. Programming is executed with the respective programming commands. For permanent
programming, the programming voltage must be applied on pin#2 (PROG) of the device to be programmed. It is also possible to apply the
programming voltage simultaneously to all devices, as the actual programming is only executed by a software command.
A parallel connection of all PROG-pins allows digital programming verification but does not allow analog programming verification.
If analog programming verification is required, each PROG pin must be selected individually for verification.
www.austriamicrosystems.com/AS5030
VSS
+ 5 V
VDD
(see Figure 22)
Micro
Controller
VDD
VSS
or the optional 2-wire interface
Output
Output
I/O
8. 0 – 8.5V
H
), a constant DC voltage of 8.0V ~ 8.5V (≥100mA) must be connected to pin #2
H
10µF 100n
), the programming voltage is not required.
Revision 2.1
10
11
12
2
(see Figure
CS
CLK
D I O
PROG
Figure 17
14
C 1
8).
13
VDD
AS5030
15
C 2
and
Figure
3
VSS
19). For temporary programming (soft
100n
H
) has been
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