Z8F08200100KITG Zilog, Z8F08200100KITG Datasheet - Page 17

• Manufacturer Part Number: Z8F08200100KITG
• Description: DEV KIT FOR Z8 ENCORE 8K/4K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KITG

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• Rohs Compliant: Yes
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4630

VCC_33V
GND
PA0_T0IN
PA1_T0OUT
PA6_SCL
PA7_SDA
-RESET
C15
18pF
GND
XIN
XOUT
VCC_33V
PA2
PA0_T0IN
PA1_T0OUT
PA2
R14
Appendix
Schematic, Z8 Encore!
Y1
18.432MHz
VCC_33V
GND
100K
10
1
2
3
4
5
6
7
8
9
1
1
1
Z8F0xx1
U7
PA6/SCL
PA7/SDA
RESET
GND
XIN
XOUT
VDD
PA0/T0IN
PA1/T0OUT
PA2/DE
XOUT
XIN
D2
RED
D3
GREEN
D4
YELL
20 pin Socket
18pF
R13
220
C16
2
2
2
PA4/RXD0
PB0/ANA0
PB1/ANA1
PA5/TXD0
PA3/CTS0
PC0/T1IN
RESET
AGND
AVDD
VREF
DBG
R8
R9
R11
SW1
+
100
100
C12
22uF
100
20
19
18
17
16
15
14
13
12
11
VCC_33V
®
PB0_ANA0
8K/4K MCU Evaluation Board, Page 1 of 2
C13
0.01uF
PB0_ANA0
PB1_ANA1
VCC_33V
PA5_TXD0
PA4_RXD0
PA3_CTS0
VCC_33V
-RESET
GND
PC0_T1IN
VREF
AGND
DBG
R3
10K
C10
0.01uF
VCC_33V
C17
0.001uF
PB1_ANA1
-RESET
R12
100
R10
100K
C18
0.001uF
PB2_ANA2
PC0_T1IN
PA6_SCL
PA7_SDA
-RESET
PC5_MISO
PC4_MOSI
PC3_SCK
PC2_SS
PA0_T0IN
PA1_T0OUT
GND
VCC_33V
XIN
XOUT
C19
0.001uF
TEST
PB3_ANA3
SW2
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Z8F0XX2
U8
PC0/T1IN
PA6/SCL
PA7/SDA
RESET
VSS
XIN
XOUT
VDD
PC5/MISO
PC4/MOSI
PC3/SCK
PC2/SS
PA0/T0IN
PA1/T0OUT
PB4_ANA4
C20
0.001uF
GND
28 pin Socket
C21
0.001uF
C4
0.1uF
PC1/T1OUT
PB0/ANA0
PB1/ANA1
PB2/ANA2
PB3/ANA3
PB4/ANA4
PA4/RXD0
PA5/TXD0
PA3/CTS0
PA2/DE
AVDD
VREF
AVSS
DBG
AGND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PB0_ANA0
PB1_ANA1
PB2_ANA2
PB3_ANA3
PB4_ANA4
VREF
AGND
VCC_33V
PC1_T1OUT
PA5_TXD0
PA4_RXD0
PA3_CTS0
+
DBG
PA2
C14
22uF
DBG
C22
0.01uF
VCC_33V
PC4_MOSI
PC3_SCK
PC0_T1IN
PC1_T1OUT
PA3_CTS0
PA4_RXD0
PA6_SCL
PA7_SDA
-RESET
GND
GND
VCC_33V
VCC_33V
PB0_ANA0
PB1_ANA1
PB2_ANA2
PB3_ANA3
PB4_ANA4
PA5_TXD0
PA3_CTS0
PA4_RXD0
DBG
connector 2
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
JP2
HEADER 30x2/SM
DBG
PA5_TXD0
PA3_CTS0
PA4_RXD0
J2
1
3
5
7
9
Header 5x2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
10
2
4
6
8
Evaluation Kit User Manual
-DIS_IrDA
GND
PC5_MISO
PA1_T0OUT
PA5_TXD0
Z8 Encore!
PC2_SS
PA0_T0IN
PA2
GND
GND
GND
-DIS_232
-DIS_IRDA
Title
If Module is plugged onto the Dev Platform the local
RS232 interface is disabled by pin 50 of JP2
®
8K/4K MCU
GND
GND
-TRSTN
-CS2
GND
A21
A22
-CS0
-BUSACK
-F91_WE
A6
A10
A8
A13
A15
A18
A19
A2
A11
A4
A5
D1
D3
D5
D7
-MREQ
-WR
connector 1
for
reference
only
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
JP1
HEADER 30x2/SM
UM015004-1105
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
-DIS_FLASH
A0
A3
A14
A16
A23
-CS1
GND
A7
A9
A17
D0
D2
D4
D6
-IOREQ
-RD
-INSTRD
-BUSREQ
VCC_33V
VCC_33V
GND
A1
A12
A20
VCC_33V
VCC_33V
12