45300 Parallax Inc, 45300 Datasheet - Page 100
![BOARD PROTO SX48](/photos/9/25/92507/mfg_45300_sml.jpg)
45300
Manufacturer Part Number
45300
Description
BOARD PROTO SX48
Manufacturer
Parallax Inc
Type
MCUr
Specifications of 45300
Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SX48
For Use With
130-28029 - KIT PARTS SMART SENSORS45111 - MANUAL FOR SX-KEY/BLITZ VER. 2.028850 - CARRIER BOARD BOARD OF EDU USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
453001
Manufacturer:
LITTELFUSE/力特
Quantity:
20 000
Company:
Part Number:
453002
Manufacturer:
LITTELFU
Quantity:
1 000
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10 SX Special Features and Coding Tips
10.4.1 RTCC Rollover Interrupts
The SX chip can be set to cause an interrupt upon rollover of the Real Time Clock Counter (RTCC). By
configuring an interrupt on RTCC rollover, the SX chip can perform an operation at a predefined time
interval in a deterministic fashion. This can be configured by setting the STACKX or OPTIONX fuse (in
the DEVICE directive) and writing to the RTI, RTS and RTE bits of the Option register (OPTION). The
RTCC rollover interrupt is disabled by default.
To configure the RTCC rollover interrupt:
Page 100 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
1) Set the STACKX or OPTIONX fuse in the DEVICE line.
2) Write to the RTI, RTS and RTE bits of the OPTION register to enable RTCC interrupts. For RTI, a
Multiple Interrupts: Using more than one interrupt, such as multiple external interrupts or both
RTCC and external interrupts, can result in missed or, at best, jittery interrupt handling should one
occur during the processing of another.
Clearing Pending Bits: When handling external interrupts, the interrupt routine should clear at least
one pending register bit. The bit that is cleared should represent the interrupt being handled in or-
der for the next interrupt to trigger.
Debugging Interrupts: The SX chip may act strangely while debugging code that contains interrupts.
The SX chip may or may not enter the RTCC interrupt routine (and will never enter a MIWU
interrupt) while using the Step or Walk functions. This is due to the SX chip giving higher priority
to the SX-Key than its internal interrupt flags. If interrupt code needs to be debugged or verified, place a
BREAK directive, or a breakpoint, in an appropriate place within the interrupt routine and use the Run or
Poll functions.
high bit (1) disables RTCC rollover interrupts and a low bit (0) enables RTCC rollover interrupts.
For RTS, a high bit (1) selects incrementing RTCC on internal clock cycle and a low bit (0)
increments RTCC on the RTCC pin transitions. For RTE, a high bit (1) selects incrementing on low-
to-high transition and a low bit (0) increments on a high-to-low transition.
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