SKP36077 Renesas Electronics America, SKP36077 Datasheet - Page 10

• Manufacturer Part Number: SKP36077
• Description: KIT DEV EVAL FOR H8/36077
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of SKP36077

• Contents: SKP Board, In-Circuit Debugger/Programmer, Target Cable, USB Cable and SKP CD-ROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8/36077
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant

H8
■
• Option for using on-chip or
• Built-in LCD RAM (up to 128
• Supports multiple duty cycles:
■
• Provides v2.0 support
• Offers full-speed, 12Mbps
• Offers high-speed, 480Mbps
• Bus-powered mode or
• Up to 9 endpoints can be specified
• Four transfer modes supported:
• On-chip bus transceiver with
• Total 1280-Byte FIFO buffer
■
• Fully compatible with Bosch
• Ideal for automobile and
• Bi-directional 2-wire serial
• Maximum speed up to 1Mbps
• Data length: 0 to 8 bytes
• Number of channels: 1 or 2
• Two data transmission methods:
• Supports 12 CPU interrupts
• Supports 6 operating modes
external power supply
bits) with byte or word access
static, 1/2, 1/3, or 1/4
communication
communication (H8S/2170)
self-powered
Control, Interrupt, Bulk, and
Isochronous
option for using external
transceiver
v2.0B specification
industrial applications
communication
– Mailbox (buffer)
– Message priority (identifier)
LCD Controller
Universal Serial Bus
Hardware Controller Area
Network (HCAN) Function
®
Family of Microcontrollers
LCD Block Diagram: H8/38099
USB Block Diagram: H8S/2215R
HCAN Block Diagram
Peripheral address bus
φ /2 to φ /256
Peripheral data bus
[USB operating clock]
EXIRQ0, EXIRQ1
DREQ0, DREQ1
[System clock]
Peripheral bus
control signal
[Internal bus]
φw
EXTAL48
XTAL48
IRQ6
(16MHz)
HCAN
φ
MBI
Message Buffer
MPI
Microprocessor
interface
Mailboxes
USB
Message control
Message data
MC0-MC15, MD0-MD15
[DMA internal request signal]
LCD port control register
[Interrupt request signal]
Display timing generator
LCD trimming register
LCD control register 2
BGR control register
LCD control register
PLL circuit
USB clock
generator
LCD RAM
Interface
(x3)
20 bytes
1280-Byte FIFO
EP0s
EP0i
(48MHz)
(48MHz)
EP0o
EP1i
UDC synchronization
(12MHz)
CPU interface
Control register
Status register
UDC core
EP2o
Registers
EP2i
circuit
LAFM
SEGn (n = 1 to 40)
EP3o
EP3i
EP4o
EP4i
data latch
Common
transceiver
Data Link Controller
register
Internal
power supply circuit)
40-bit
Bosch CAN 2.0B
shift
constant-voltage
EP5i
power supply
(On-chip 3-V
Rx buffer
LCD drive
Tx buffer
(CDLC)
active
CAN
[Power mode selection]
[Connection/disconnection]
[Suspend]
[Power supply]
[Data]
Common
Segment
USD+
USD-
driver
driver
Legend:
UDC:
USB Device Controller
EP0s:
Endpoint 0 setup FIFO
EP0i to 5i:
Endpoint 0 to 5 In FIFO
EP0o to 4o:
Endpoint 0 to 4 Out FIFO
DrVcc
DrVss
UBPM
VBUS
USPND
Rs
Rs
D+
D-
C1
C2
Vcc
COM1
COM4
SEG40
SEG39
SEG38
SEG37
SEG36
SEG1
HTxD
HRxD
V1
V2
V3
Vss
8