EDK7145 Renesas Electronics America, EDK7145 Datasheet - Page 3

• Manufacturer Part Number: EDK7145
• Description: DEV EVALUATION KIT SH7145
• Manufacturer: Renesas Electronics America
• Type: MCUr

Specifications of EDK7145

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: SH7145
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant

Jumper Block
Jumper Block
10 - 11
General Use
1 - 2
4 - 5
7 - 8
User Mode
(DISABLED)
(DISABLED)
(DISABLED)
(DISABLED)
(default)
(default)
ENABLED
ENABLED
ENABLED
ENABLED
MD0
MD1
MD2
MD3
for
for
GROUND
MD0 = 1
MD1 = 1
MD2 = 1
MD3 = 1
(1)
(1)
(1)
(1)
USER MODE JUMPERS
0
0
0
0
GROUND
CJ5
CJ4
10
11
12
10
11
12
3V3
11 - 12
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
2 - 3
5 - 6
8 - 9
GROUND
NC
NC
NC
UVCC
3V3
MD0 = 0
MD1 = 0
MD2 = 0
MD3 = 0
CR17
CR25
3V3
GROUND
R3
R4
1
1
1
1
4K7
4K7
4K7
4K7
DBGMD
RXDISn
VCC=UVCC
VCC=UVCC
BOOT_MD0
BOOT_MD1
BOOT_MD2
BOOT_MD3
GROUND
BOOT_NMI
BOOT_FW
PA10
UPM
CSn
UVCC
2-D1
2-B1
1-D3
1-C3
2-D6 4-C3
5-C1
2-D6
2-C1
2-D1
2-D1
2-D1
2-D1
2-C1
RXDISn
MD3=1
MD2=1
MD1=0
MD0=0
UPM
HUDI
CSn
10 - 11
1 - 2
4 - 5
7 - 8
Serial Rx via Flash Header ENABLED
disallowing Rx via 9-Way D connector
Device in User Program Mode
Enable HUDI (E10A) interface
SRAM Enabled
=
Peripheral Clock * 2
Internal Clock * 4
Boot Mode
MD0
MD1
MD2
MD3
2-D2
2-D2
2-D2
2-D2
11 - 12
2 - 3
DEFAULT
5 - 6
DEFAULT
8 - 9
DEFAULT
DEFAULT
Device in Normal User Mode
SRAM Disabled
On chip ROM active
Peripheral Clock * 2
HUDI (E10A) interface disabled
Single Chip Mode
Internal Clock * 4
Serial Rx via Flash Header DISABLED
User Mode
1-A2
1-A2
1-A2
1-D2
1-B2
1-A2
2-C3
1-B2
1-B2
1-B2
1-B2
1-B2
1-C3
1-B2
1-B2
1-A2
1-B2
1-A2
1-A2
1-A2
1-D2
2-C3
PE12
PE9
PE11
ASEBRKAKn
PE8
PE10
RESn
PE0
PE6
PE5
PE4
PE3
PA16
PE2
PE1
PE12
PE8
PE9
PE10
PE11
ASEBRKAKn
RESn
GROUND
E10A Connector
NC
NC
11
13
15
17
19
21
23
25
27
29
31
33
35
1
3
5
7
9
11
13
SHIELD=GROUND
1
3
5
7
9
N10236-5212VC
TCK
TRSTn
TDO
ASEBRKn
TMS
TDI
RESETn
AUDCK_IO
AUDATA0
AUDATA1
AUDATA2
AUDATA3
AUDSYNCn
AUDRST
AUDMD
TCK
TMS
TRSTn
TDI
TDO
ASEBRKAKn
CK
RESETn
UC_GND
AUDCK_I
DNF
BHI-14T
J4
J3
GND
GND
GND
VCC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
10
12
14
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
2
4
6
8
UVCC
GROUND
GROUND
HITACHI MICRO SYSTEMS EUROPE LTD
DRAWN BY
SCHEMATIC TITLE
SHEET TITLE
M.C.
Whitebrook Park, Maidenhead, Berkshire
Mode and Option Selection
For Evaluation Purposes
23-07-02
DATE
Debug Connectors
UNITED KINGDOM
EDK 7145
REV DRAWING NUMBER PAGE
2
D004132_04
SIZE A4
3
5