EDK2638 Renesas Electronics America, EDK2638 Datasheet - Page 8

• Manufacturer Part Number: EDK2638
• Description: DEV EVALUATION KIT H8S/2638
• Manufacturer: Renesas Electronics America
• Series: H8®r
• Type: MCUr

Specifications of EDK2638

• Contents: 2G (Second-generation) Evaluation Board, HEW debugger support, Cable and CD-ROM
• For Use With/related Products: H8S/2638
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Fitting the jumper in the default position (10-11) allows the lower byte of the SRAM to be selected during memory access.
When a read is performed, the glue logic enables both the upper and lower byte select lines, in both 8-bit and 16-bit mode.
By fitting the jumper in position (11-12), the output from the glue logic is disabled, and the low byte select line on the SRAM
is pulled high via a 4k7 resistor and the lower half of the data bus is unused.
The H8S/2638 microcontroller multiplexes the functions of Port-A bit-1 (PA1) between the external address bus A17 and
Serial Port 2 transmit pin. The EDK is configured to allow access to the SRAM by default. This means that A17 is normally
available to the SRAM. R5 connects PA1 on the microcontroller to address line A17 on the SRAM. Removing this link
disables A17 on the SRAM and allows the use of PA1 on the Microcontroller.
The H8S/2638 microcontroller has no chip-select management built in. There is no external chip selection hardware
associated with this device. The chip select of the SRAM is connected to address strobe (AS) of the microcontroller.
In 8 bit mode, the address range is H'40 000 – H'7F FFF in area 0, (h'40 000 + h'3F FFF (256K)) using A0 to A17
In 16-bit mode, the address range is H'40 000 – H'7F FFF in area 0, (h'40 000 + h'3F FFF (256K)) using A1 to A17
Aliasing of the address space is possible in areas (Area1 - Area7) as the address strobe is used as a chip select for the
SRAM without address decoding.
To use 16-bit mode, ensure that A0 line of the H8S/2638 is not used to drive A0 of the SRAM, as A0 may not be resolved in
time for 16 bit addresses. A0 should be tied high by the microcontroller by setting Port-C bit-0 as an input, and setting the
internal MOS pull up register to pull this bit high.
4.4. M
Table 4-1 illustrates the EDK memory map for mode 2.
EMORY
M
R5
Zero-ohm link
AP
H'0000 0000
H'0003 FFFF
H'0004 0000
H'0007 FFFF
H'0008 0000
H'00FF AFFF
H'00FF B000
H'00FF EFBF
H'00FF EFC0
H'00FF F7FF
H'00FF F800
H'00FF FF3F
H'00FF FF40
H’00FF FF5F
H'00FF FF60
H’00FF FFBF
H'00FF FFC0
H’00FF FFFF
Section Start
Section End
Fitted
Default
T
ABLE
Option Jumpers for PA1
PA1 connected to SRAM A17
4-1: M
EMORY
On-Chip ROM
External SRAM
Reserved
On-Chip RAM
Reserved
I/O Registers
Reserved
I/O Registers
On-Chip RAM
M
AP
(D
EFAULT
Section Allocation
Function
M
ODE
2)
8