MPC8323E-MDS-PB Freescale Semiconductor, MPC8323E-MDS-PB Datasheet - Page 46

• Manufacturer Part Number: MPC8323E-MDS-PB
• Description: BOARD MODULE DEV SYSTEM 8323
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8323E-MDS-PB

• Contents: Board
• For Use With/related Products: MPC8323
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HDLC, BISYNC, Transparent, and Synchronous UART
Figure 38
Figure 39
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
46
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
2. The symbols used for timing specifications follow the pattern of t
Outputs—Internal clock delay
Outputs—External clock delay
Outputs—Internal clock high impedance
Outputs—External clock high impedance
Inputs—Internal clock input setup time
Inputs—External clock input setup time
Inputs—Internal clock input hold time
Inputs—External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
2. The symbols used for timing specifications follow the pattern of t
are measured at the pin.
inputs and t
internal timing (HI) for the time t
are measured at the pin.
inputs and t
internal timing (UAI) for the time t
invalid (X).
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Table 51. HDLC, BISYNC, and Transparent UART AC Timing Specifications
provides the AC test load.
and
(first two letters of functional block)(reference)(state)(signal)(state)
(first two letters of functional block)(reference)(state)(signal)(state)
Figure 40
Characteristic
Characteristic
Output
represent the AC timing from
Table 52. Synchronous UART AC Timing Specifications
serial
serial
memory clock reference (K) goes from the high state (H) until outputs (O) are invalid (X).
memory clock reference (K) goes from the high state (H) until outputs (O) are
Figure 38. AC Test Load
Z
0
= 50 Ω
Table
(first two letters of functional block)(signal)(state)(reference)(state)
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
for outputs. For example, t
51. Note that although the specifications
Symbol
Symbol
t
t
t
t
t
t
UAEKHOV
UAEKHOX
t
t
t
UAIKHOV
UAIKHOX
UAEIVKH
UAEIXKH
UAIIVKH
UAIIXKH
HEIXKH
R
L
= 50 Ω
2
2
OV
Min
Min
1
0
1
0
1
6
4
0
1
DD
UAIKHOX
HIKHOX
1
/2
1
Freescale Semiconductor
(continued)
symbolizes the outputs
symbolizes the outputs
Max
Max
5.5
5.5
10
—
—
—
—
—
8
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
for
for