ST7MDT20M-EMU3 STMicroelectronics, ST7MDT20M-EMU3 Datasheet - Page 16
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ST7MDT20M-EMU3
Manufacturer Part Number
ST7MDT20M-EMU3
Description
KIT EMULATOR FOR ST72321/72521
Manufacturer
STMicroelectronics
Series
ST7-EMU3r
Type
Microcontrollerr
Specifications of ST7MDT20M-EMU3
Contents
Main Emulation Board (MEB), Target Emulation Board (TEB), Cables, Power Supply and Documentation
For Use With/related Products
ST72321, ST72521
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-4880
4 - Emulation characteristics
16/28
CSS (Clock Security System)
This option allows you to Enable or Disable the clock security system (CSS), which
includes the clock filter and the backup safe oscillator. When enabled, the selected
OSCRANGE is used to determine the operating frequency range, and when the
frequency is out of range, the clock source is switched to the backup oscillator.
OSCRANGE
This option allows you to select the normal operating frequency range for the Clock
Security System. The following operating frequency range options are available:
•
•
•
•
•
PLL
This option allows you to Enable or Disable the PLL, which allows the multiplication
by two of the main input clock frequency. The PLL is guaranteed only when the
input frequency is between 2 and 4 MHz.
RSTC (Reset clock cycle selection)
This option allows you to select the number of CPU cycles applied during the
RESET phase and when exiting HALT mode. You can choose between 4096 CPU
cycles and 256 CPU cycles .
VD (Voltage detection)
This option allows you to enable the voltage detection block (LVD and AVD) with a
selected threshold for the LVD and AVD. The options available are:
•
•
•
•
VLP 32~100 kHz
LP 1~2 MHz
MP 2~4 MHz
MS 4~8 MHz
HS 8~16 MHz
LVD/AVD OFF — Both LVD and AVD are disabled.
Highest Voltage
Medium Voltage
Lowest Voltage
ST7MDT20M-EMU3 Probe User Guide