HS2339EPI61H-U Renesas Electronics America, HS2339EPI61H-U Datasheet - Page 396

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HS2339EPI61H-U

Manufacturer Part Number
HS2339EPI61H-U
Description
EMULATOR BASE UNIT H8S/2339 FAM
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet

Specifications of HS2339EPI61H-U

Contents
E6000 Emulator and CD-ROM
For Use With/related Products
H8S/2339
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
8.2
There are the following notes on usage of the emulator.
8.2.1
To execute the tutorial program, specify “Tutorial.hws” stored in the following directory:
HEW installation destination directory\Tools\Renesas\DebugComp\Platform\E6000\2339\Tutorial
8.2.2
In the E6000 emulator, one evaluation chip emulates several types of MCU. Therefore, there are some
differences in I/O registers between an actual MCU and the emulator. Note these differences when accessing the
I/O registers.
I/O port is in the input state at default. The I/O register contents indicate the emulator port status. When the user
system interface cable is not connected, the read value is 1 due to pull-up resistors.
In the emulator, accesses to the following registers for controlling the flash memory are invalid.
Note: The addresses indicate the lower 16 bits.
8.2.3
When accessing the reserved area, note the followings:
1. In the H8S/2339 group and H8S/2329 group, an access (read or write) to the reserved area H’60000 to
2. Part of the reserved area (specified in each MCU’s memory map) can be used as an external address area
3. If the reserved area other than that described above is used, the operation in the actual MCU cannot be
8.2.4
When the RAME bit in SYSCR is 0, the on-chip RAM area can be used external addresses. Note that, however,
the only memory that can be accessed is User (external memory), not Emulator (emulation memory). In this case,
the On-Chip Read-write (Internal RAM) setting is applied for memory mapping.
368
RAM emulation register (RAMER: H'FEDB)
System control register 2 (SYSCR2: H'FF42)
Flash memory control register 1 (FLMCR1: H'FFC8)
Flash memory control register 2 (FLMCR2: H'FFC9)
Block register 1 (EBR1: H'FFCA)
Block register 2 (EBR2: H'FFCB)
H’7FFFF is enabled through the following emulator commands. However, the access (read or write) to the
reserved area H’60000 to H’7FFFF is prohibited while the emulator is executing a program.
when the EAE bit of the BCRL is set to "1". User (user memory) or Emulator (emulation memory) can be
specified for this area with the Memory Mapping settings.
guaranteed. If the user program extends to the reserved area during debugging, select the MCU having the
largest ROM capacity (for example, debug the program for H8S/2332 in the H8S/2337 mode).
File-Load (FL)
Memory-Edit (ME)
Memory-Fill (MF)
Memory-Move (MV)
Memory-Test (MT)
Notes on Usage of the H8S/2339 E6000 Emulator
Environment for Execution of the Tutorial Program
I/O Register Differences between the Actual MCU and the Emulator
Access to the Reserved Area
Using the On-Chip RAM Area as External Addresses

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