AD9744ACP-PCB Analog Devices Inc, AD9744ACP-PCB Datasheet - Page 5

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AD9744ACP-PCB

Manufacturer Part Number
AD9744ACP-PCB
Description
BOARD EVAL FOR AD9744ACP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9744ACP-PCB

Rohs Status
RoHS non-compliant
Number Of Dac's
1
Number Of Bits
14
Outputs And Type
1, Differential
Sampling Rate (per Second)
210M
Data Interface
Parallel
Settling Time
11ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9744
Parameter
1
2
3
DIGITAL SPECIFICATIONS
T
Table 3.
Parameter
DIGITAL INPUTS
CLK INPUTS
1
2
Measured single-ended into 50 Ω load.
Output noise is measured with a full-scale output set to 20 mA with no conversion activity. It is a measure of the thermal noise only.
Noise spectral density is the average noise power normalized to a 1 Hz bandwidth, with the DAC converting and producing an output tone.
Includes CLOCK pin on SOIC/TSSOP packages and CLK+ pin on LFCSP package in single-ended clock input mode.
Applicable to CLK+ and CLK– inputs when configured for differential or PECL clock input mode.
MIN
Multitone Power Ratio (8 Tones at 400 kHz Spacing)
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
Input Setup Time (t
Input Hold Time (t
Latch Pulse Width (t
Input Voltage Range
Common-Mode Voltage
Differential Voltage
f
to T
CLOCK
0 dBFS Output
−6 dBFS Output
−12 dBFS Output
−18 dBFS Output
MAX
= 78 MSPS; f
2
, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, I
1
H
S
)
OUT
)
LPW
)
= 15.0 MHz to 18.2 MHz
DB0–DB13
CLOCK
IOUTA
IOUTB
OR
t
S
Figure 2. Timing Diagram
Rev. B | Page 5 of 32
t
PD
OUTFS
0.1%
= 20 mA, unless otherwise noted.
Min
2.1
−10
−10
2.0
1.5
1.5
0
0.75
0.5
t
t
ST
LPW
t
H
0.1%
Min
Typ
3
0
5
1.5
1.5
Typ
66
68
62
61
Max
0.9
+10
+10
3
2.25
Max
Unit
V
V
µA
µA
pF
ns
ns
ns
V
V
V
Unit
dBc
dBc
dBc
dBc
AD9744

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