AD9748ACP-PCB Analog Devices Inc, AD9748ACP-PCB Datasheet - Page 16

• Manufacturer Part Number: AD9748ACP-PCB
• Description: BOARD EVAL FOR AD9748ACP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9748ACP-PCB

• Rohs Status: RoHS non-compliant
• Number Of Dac's: 1
• Number Of Bits: 8
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 210M
• Data Interface: Parallel
• Settling Time: 11ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9748

AD9748
DIFFERENTIAL COUPLING USING AN OP AMP
An op amp can also be used to perform a differential-to-single-
ended conversion, as shown in Figure 26. The AD9748 is
configured with two equal load resistors, R
differential voltage developed across IOUTA and IOUTB is
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
IOUTA and IOUTB, forming a real pole in a low-pass filter. The
addition of this capacitor also enhances the op amp’s distortion
performance by preventing the DAC’s high slewing output from
overloading the op amp’s input.
The common-mode rejection of this configuration is typically
determined by the resistor matching. In this circuit, the differential
op amp circuit using the AD8047 is configured to provide some
additional signal gain. The op amp must operate off a dual
supply because its output is approximately ±1 V. A high speed
amplifier capable of preserving the differential performance
of the AD9748 while meeting other system level objectives (that
is, cost or power) should be selected. The op amp’s differential
gain, gain setting resistor values, and full-scale output swing
capabilities should all be considered when optimizing this circuit.
The differential circuit shown in Figure 27 provides the
necessary level shifting required in a single-supply system. In
this case, AVDD, which is the positive analog supply for both
the AD9748 and the op amp, is also used to level shift the
differential output of the AD9748 to midsupply (that is,
AVDD/2). The AD8041 is a suitable op amp for this application.
AD9748
AD9748
IOUTA
IOUTB
Figure 27. Single-Supply DC Differential Coupled Circuit
Figure 26. DC Differential Coupling Using an Op Amp
IOUTA
IOUTB
25Ω
25Ω
C
OPT
C
OPT
25Ω
225Ω
225Ω
25Ω
225Ω
225Ω
1kΩ
LOAD
500Ω
AD8041
500Ω
, of 25 Ω. The
AD8047
1kΩ
500Ω
AVDD
Rev. A | Page 16 of 24
SINGLE-ENDED, UNBUFFERED VOLTAGE OUTPUT
Figure 28 shows the AD9748 configured to provide a unipolar
output range of approximately 0 V to 0.5 V for a doubly
terminated 50 Ω cable because the nominal full-scale current,
I
In this case, R
by IOUTA or IOUTB. The unused output (IOUTA or IOUTB)
can be connected to ACOM directly or via a matching R
Different values of I
the positive compliance range is adhered to. One additional
consideration in this mode is the integral nonlinearity (INL),
discussed in the Analog Outputs section. For optimum INL
performance, the single-ended, buffered voltage output
configuration is suggested.
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 29 shows a buffered single-ended output configuration
in which the op amp U1 performs an I-V conversion on the
AD9748 output current. U1 maintains IOUTA (or IOUTB) at a
virtual ground, minimizing the nonlinear output impedance
effect on the DAC’s INL performance as described in the
Analog Outputs section. Although this single-ended
configuration typically provides the best dc linearity
performance, its ac distortion performance at higher DAC
update rates can be limited by U1’s slew rate capabilities. U1
provides a negative unipolar output voltage, and its full-scale
output voltage is simply the product of R
scale output should be set within U1’s voltage output swing
capabilities by scaling I
distortion performance can result with a reduced I
U1 is required to sink less signal current.
OUTFS
AD9748
, of 20 mA flows through the equivalent R
IOUTA
IOUTB
AD9748
IOUTA
IOUTB
Figure 28. 0 V to 0.5 V Unbuffered Voltage Output
Figure 29. Unipolar Buffered Voltage Output
LOAD
I
OUTFS
represents the equivalent load resistance seen
I
OUTFS
OUTFS
= 10mA
OUTFS
25Ω
= 20mA
and R
200Ω
and/or R
LOAD
50Ω
can be selected as long as
200Ω
C
FB
R
U1
OPT
FB
. An improvement in ac
FB
and I
V
OUTA
LOAD
50Ω
V
OUTFS
= 0V TO 0.5V
OUT
OUTFS
of 25 Ω.
= I
. The full-
OUTFS
because
LOAD
× R
.
FB