AD9880/PCB Analog Devices Inc, AD9880/PCB Datasheet - Page 39

• Manufacturer Part Number: AD9880/PCB
• Description: BOARD EVALUATION PCB AD9880
• Manufacturer: Analog Devices Inc

Specifications of AD9880/PCB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

0x0D
SYNC
0x0E
0x0F
0x10
0x11
0x11
0x11
0x11
0x11
These eight bits are the blue channel offset control.
The offset control shifts the analog input, resulting in
a change in brightness. Note that the function of the
offset register depends on whether clamp feedback is
enabled (Register 0x1C, Bit 7 = 1).
If clamp feedback is disabled, the offset register bits
control the absolute offset added to the channel. The
offset control provides a +127/−128 LSBs of adjust-
ment range, with 1 LSB of offset corresponding to
1 LSB of output code. If clamp feedback is enabled
these bits provide the relative offset (brightness) from
the offset adjust in the previous register. The power-up
default is 0x80.
7-0
Selects the max Hsync pulse width for composite sync
separation. Power-down default is 0x20.
7-2
The enter level for the SOG slicer. Must be < than exit
level (Register 0x10). The power-up default is 0x10.
7-2
The exit level for the SOG slicer. Must be > enter level
(Register 0x0F). The power-up default is 0x10.
7
0 = Hsync, 1 = SOG. The power-up default is 0. These
selections are ignored if Register 0x11, Bit 6 = 0.
6
0 = auto Hsync source, 1 = manual Hsync source.
Manual Hsync source is defined in Register 0x11,
Bit 7. The power-up default is 0.
5
0 = Vsync, 1 = Vsync from SOG. The power-up
default is 0. These selections are ignored if Register
0x11, Bit 4 = 0.
4
0 = auto Vsync source, 1 = MANUAL Vsync source.
Manual Vsync source is defined in Register 0x11,
Bit 5. The power-up default is 0.
3
0 = Channel 0, 1 = Channel 1. The power-up default is
0. These selections are ignored if Register 0x11,
Bit 2 = 0.
7-0
Sync Separator
SOG Comparator Threshold Enter
SOG Comparator Threshold Exit
Hsync Source
Hsync Source Override
Vsync Source
Vsync Source Override
Channel Select
Blue Channel Offset
Rev. 0 | Page 39 of 64
0x11
0x11
0x11
0x12
0x12
0x12
0x12
COAST AND CLAMP CONTROLS
0x12
0x12
0x12
0x12
2
0 = auto channel select, 1 = manual channel select.
Manual channel select is defined in Register 0x11,
Bit 3. The power-up default is 0.
1
0 = analog interface, 1 = digital interface. The power-
up default is 0. These selections are ignored if
Register 0x11, Bit 0 = 0.
0
0 = auto interface select, 1 = manual interface select.
Manual interface select is defined in Register 0x11,
Bit 1. The power-up default is 0.
7
0 = active low, 1 = active high. The power-up default is
1. These selections are ignored if Register 10x2,
Bit 6 = 0.
6
0 = auto Hsync polarity, 1 = manual Hsync polarity.
Manual Hsync polarity is defined in Register 0x11,
Bit 7. The power-up default is 0.
5
0 = active low, 1 = active high. The power-up default is
1. These selections are ignored if Register 0x11,
Bit 4 = 0.
4
0 = auto Vsync polarity, 1 = manual Vsync polarity.
Manual Vsync polarity is defined in Register 0x11,
Bit 5. The power-up default is 0.
3
0 = active low, 1 = active high. The power-up default
is 1.
2
0 = auto Coast polarity, 1 = manual Coast polarity.
The power-up default is 0.
1
0 = internal Coast, 1 = external Coast. The power-up
default is 0.
0
0 = use raw Vsync for Coast generation, 1 = use
filtered Vsync for Coast generation The power-up
default is 1.
Channel Select Override
Interface Select
Interface Select Override
Input Hsync Polarity
Hsync Polarity Override
Input Vsync Polarity
Vsync Polarity Override
Input Coast Polarity
Coast Polarity Override
Coast Source
Filter Coast Vsync
AD9880