DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 19
DSP56F803EVM
Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor
Datasheets
1.CWH-UTP-ONCE-HE.pdf
(2 pages)
2.DSP56F803EVM.pdf
(68 pages)
3.DSP56F803BU80E.pdf
(52 pages)
Specifications of DSP56F803EVM
Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Notes:
Freescale Semiconductor
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to case
Junction to center of case
I/O pin power dissipation
Power dissipation
Junction to center of case
Voltage difference V
ADC reference voltage
Ambient operating temperature
1.
2.
3.
Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application.
Determined on 2s2p thermal test board.
Junction to ambient thermal resistance, Theta-JA (R
specification JESD51-2 in a horizontal configuration in natural convection. Theta-JA was also simulated on
a thermal test board with two internal planes (2s2p where “s” is the number of signal layers and “p” is the
number of planes) per JESD51-6 and JESD51-7. The correct name for Theta-JA for forced convection or with
the non-single layer boards is Theta-JMA.
Junction to case thermal resistance, Theta-JC (R
using the cold plate technique with the cold plate temperature used as the “case” temperature. The basic cold
plate measurement technique is described by MIL-STD 883D, Method 1012.1. This is the correct thermal
metric to use to calculate thermal performance when the package is being used with a heat sink.
Characteristic
Characteristic
SS
to V
Table 3-2 Recommended Operating Conditions
SSA
Table 3-3 Thermal Characteristics
Four layer board (2s2p)
Four layer board (2s2p)
Comments
56F803 Technical Data, Rev. 16
θJC
Symbol
VREF
ΔV
T
), was simulated to be equivalent to the measured values
A
SS
θJA
) was simulated to be equivalent to the JEDEC
Symbol
P
R
R
(2s2p)
R
R
R
P
Ψ
DMAX
P
θJMA
θJMA
θJMA
θJA
θJC
JT
I/O
D
Min
-0.1
–40
2.7
P
D
User Determined
= (I
(TJ - TA) /R
100-pin LQFP
6
Typ
DD
–
–
-
Value
41.7
37.2
34.2
10.2
0.8
x V
32
DD
θ
+ P
JA
V
Max
I/O
0.1
85
DDA
)
General Characteristics
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
W
W
W
Unit
°C
V
V
Notes
4, 5
1,2
1,2
2
2
3
7
19