HS7727KCI01H Renesas Electronics America, HS7727KCI01H Datasheet - Page 224
HS7727KCI01H
Manufacturer Part Number
HS7727KCI01H
Description
ON CHIP DEBUG EMULATOR
Manufacturer
Renesas Electronics America
Datasheets
1.HS7727KCI01H.pdf
(234 pages)
2.HS7727KCI01H.pdf
(32 pages)
3.HS7727KCI01H.pdf
(14 pages)
Specifications of HS7727KCI01H
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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6.5.8
1. When [Go to cursor], [Step In], [Step Over], or [Step Out] is selected, the settings of Break
2. Executing the instructions at the addresses containing BREAKPOINT invalidates the channel
3. If a PC break address condition is set to the slot instruction after a delayed branch instruction,
4. When a Break Condition is satisfied, emulation may stop after two or more instructions have
6.5.9
In the [Configuration] window, if [User] is set while the UBC_MODE command has been set, the
STEP-type commands that use BREAK_CONDITION2 for implementation cannot be used. If
these commands are used, the message box shown in figure 6.10 is displayed.
Note: Note the followings when the UBC is used in the user program:
204
Condition 2 are disabled.
2 settings of the BREAKCONDITION_SET command. Make sure not to set BREAKPOINTs
at addresses where the channel 2 settings of the BREAKCONDITION_SET command are to
be satisfied.
user program execution cannot be terminated before the slot instruction execution even when
the PC option is specified in the <addrcycle> parameter; execution stops before the branch
destination instruction.
been executed.
Notes on Setting the BREAKCONDITION_SET Command
Notes on Setting the UBC_MODE Command
When the E10A emulator is connected:
When the ASEMD0 pin is low without connecting the E10A emulator:
When the ASEMD0 pin is high without connecting the E10A emulator:
Always write 1 to bit 2 in the BRCR register.
Always write 1 to bit 2 in the BRCR register.
Always write 0 to bit 2 in the BRCR register.
Figure 6.10 [HDI] Message Box
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