DS21448DK Maxim Integrated Products, DS21448DK Datasheet - Page 49
DS21448DK
Manufacturer Part Number
DS21448DK
Description
KIT DESIGN LIU DS21448 T1/J1/E1
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21448L.pdf
(60 pages)
Specifications of DS21448DK
Main Purpose
Telecom, Line Interface Units (LIUs)
Utilized Ic / Part
DS21448
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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10.
Table 10-A. AC Characteristics—Multiplexed Parallel Port (BIS0 = 0)
(V
Cycle Time
Pulse Width, DS Low or RD High
Pulse Width, DS High or RD Low
Input Rise/Fall Times
R/W Hold Time
R/W Setup Time Before DS High
CS Setup Time Before DS, WR, or RD Active
CS Hold Time
Read Data Hold Time
Write Data Hold Time
Muxed Address Valid to AS or ALE Fall
Muxed Address Hold Time
Delay Time DS, WR, or RD to AS or ALE Rise
Pulse Width AS or ALE High
Delay Time, AS or ALE to DS, WR, or RD
Output Data Delay Time from DS or RD
Data Setup Time
Figure 10-1. Intel Bus Read Timing (PBTS = 0, BIS0 = 0)
DD
= 3.3V ±5%, T
AD0–AD7
AC TIMING PARAMETERS AND DIAGRAMS
WR
ALE
RD
CS
PARAMETER
A
t ASD
= -40°C to +85°C.)
PW
t
t ASD
EL
ASL
PW
(Figure
ASH
10-1,
SYMBOL
PW
PW
PW
t
t
t
t
t
t
t
t
t
t
t
t
ASED
R
RWH
DHW
RWS
t
t
DSW
CYC
DHR
ASD
DDR
ASL
AHL
CS
CH
, t
49 of 60
t
Figure
ASH
EH
t
EL
CS
F
t
AHL
ASED
10-2, and
t CYC
CONDITIONS
t DDR
Figure
PW
EH
10-3)
MIN
200
100
100
10
50
20
10
15
10
20
30
10
20
50
0
5
t
TYP
CH
t
DHR
MAX
20
50
80
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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