EVAL-ADT7473EBZ ON Semiconductor, EVAL-ADT7473EBZ Datasheet - Page 17
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EVAL-ADT7473EBZ
Manufacturer Part Number
EVAL-ADT7473EBZ
Description
BOARD EVALUATION FOR ADT7473
Manufacturer
ON Semiconductor
Series
dBCool®r
Type
Temperature Sensorr
Datasheet
1.ADT7473ARQZ-1RL.pdf
(74 pages)
Specifications of EVAL-ADT7473EBZ
Contents
Evaluation Board
For Use With/related Products
ADT7473
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
length. This series resistance appears as a temperature offset
in the remote sensor’s temperature measurement. This error
typically causes a 0.5°C offset per W of parasitic resistance
in series with the remote diode.
effect of this series resistance on the temperature reading,
giving a more accurate result without the need for user
characterization of this resistance. The ADT7473/
ADT7473−1 is designed to automatically cancel up to 3 kW
of resistance, typically. This is transparent to the user by
using an advanced temperature measurement method. This
feature allows resistances to be added to the sensor path to
produce a filter, allowing the part to be used in noisy
environments. See the Noise Filtering section for details.
Factors Affecting Diode Accuracy
Remote Sensing Diode
either substrate transistors built into processors or discrete
transistors. Substrate transistors are generally PNP types with
the collector connected to the substrate. Discrete types can be
either PNP or NPN transistors connected as a diode
(base−shorted to the collector). If an NPN transistor is used,
the collector and base are connected to D+ and the emitter is
connected to D−. If a PNP transistor is used, the collector and
base are connected to D− and the emitter is connected to D+.
discrete transistors, a number of factors should be taken into
consideration:
•
register. Then, the ADT7473/ADT7473−1 automatically
adds it to or subtracts it from the temperature measurement.
•
The ADT7473/ADT7473−1 automatically cancels out the
The ADT7473/ADT7473−1 is designed to work with
To reduce the error due to variations in both substrate and
DT + n
To factor this in, the user can write the DT value to the offset
The ideality factor, n
the deviation of the thermal diode from ideal behavior.
The ADT7473/ADT7473−1 is trimmed for an n
of 1.008. Use the following equation to calculate the
error introduced at a temperature, T(°C), when using a
transistor whose n
data sheet for the related CPU to obtain the n
Some CPU manufacturers specify the high and low
current levels of the substrate transistors. The high
current level of the ADT7473/ADT7473−1, I
96 mA and the low level current, I
ADT7473/ADT7473−1 current levels do not match the
current levels specified by the CPU manufacturer, it
might be necessary to remove an offset. The CPU’s
data sheet advises whether this offset needs to be
removed and how to calculate it. This offset can be
programmed to the offset register. It is important to
note that, if more than one offset must be considered,
the algebraic sum of these offsets must be programmed
to the offset register.
f
* 1.008 1.008
f
does not equal 1.008. Refer to the
f
, of the transistor is a measure of
273.15 K ) T
LOW
, is 6 mA. If the
f
HIGH
values.
f
value
(eq. 2)
http://onsemi.com
, is
17
ADT7473−1, the best accuracy is obtained by choosing
devices according to the following criteria:
•
•
•
•
SOT−23 packages, are suitable devices to use.
Nulling Out Temperature Errors
high frequency clocks when routing the D+/D– traces
around a system board. Even when recommended layout
guidelines are followed, some temperature errors can still be
attributable to noise coupled onto the D+/D– lines. Constant
high frequency noise usually attenuates or increases
temperature measurements by a linear, constant value.
registers at Register 0x70 and Register 0x72 for the
Remote 1 and Remote 2 temperature channels. By
performing a one−time calibration of the system, the user
can determine the offset caused by system board noise and
null it out using the offset registers. The offset registers
automatically add a twos complement, 8−bit reading to
every temperature measurement. The LSBs add +0.5°C
offset to the temperature reading so the 8−bit register
effectively allows temperature offsets of up to ±64°C with
a resolution of +0.5°C. This ensures that the readings in the
temperature measurement registers are as accurate as
possible.
Temperature Offset Registers
Register 0x70, Remote 1 Temperature Offset = 0x00
(0°C default)
Register 0x71, Local Temperature Offset = 0x00
(0°C default)
Register 0x72, Remote 2 Temperature Offset = 0x00
(0°C default)
ADT7460/ADT7473/ADT7473−1
Backwards−Compatible Mode
temperature measurements are stored in the zone
temperature value registers (Register 0x25, Register 0x26,
and Register 0x27) in twos complement, in the range −63°C
to +127°C. (The ADT7473/ADT7473−1 still makes
calculations based on the Offset 64 extended range and
clamps the results, if necessary.) The temperature limits
must be reprogrammed in twos complement. If a twos
complement temperature below −63°C is entered, the
If a discrete transistor is used with the ADT7473/
Transistors, such as 2N3904, 2N3906, or equivalents in
As CPUs run faster, it becomes more difficult to avoid
The ADT7473/ADT7473−1 has temperature offset
By setting Bit 1 of Configuration Register 5 (0x7C), all
Base−emitter voltage greater than 0.25 V at 6 mA, at the
highest operating temperature
Base−emitter voltage less than 0.95 V at 100 mA, at the
lowest operating temperature
Base resistance less than 100 W
Small variation in h
tight control of V
BE
FE
characteristics
(such as 50 to 150) that indicates