SW006012 Microchip Technology, SW006012 Datasheet - Page 97

• Manufacturer Part Number: SW006012
• Description: C COMPILER FOR DSPIC30F FAMILY
• Manufacturer: Microchip Technology
• Type: MPLAB® C30 Compilerr
• Series: PIC24 & DsPICr

Specifications of SW006012

• Supported Families: PIC24, DsPIC30F And DsPIC33F
• Core Architecture: PIC, DsPIC
• Kit Contents: Software And Docs
• Mcu Supported Families: PIC24 MCUs And DsPIC DSCs
• Tool Type: Compiler
• Processor Series: PIC24, dsPIC
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: dsPIC30F
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.1
7.2
© 2007 Microchip Technology Inc.
INTRODUCTION
HIGHLIGHTS
Interrupt processing is an important aspect of most microcontroller applications.
Interrupts may be used to synchronize software operations with events that occur in
real time. When interrupts occur, the normal flow of software execution is suspended
and special functions are invoked to process the event. At the completion of interrupt
processing, previous context information is restored and normal execution resumes.
The dsPIC30F devices support multiple interrupts from both internal and external
sources. In addition, the devices allow high-priority interrupts to override any low
priority interrupts that may be in progress.
The MPLAB C30 compiler provides full support for interrupt processing in C or inline
assembly code. This chapter presents an overview of interrupt processing.
Items discussed in this chapter are:
• Writing an Interrupt Service Routine – You can designate one or more C
• Writing the Interrupt Vector – The dsPIC30F devices use interrupt vectors to
• Interrupt Service Routine Context Saving – To handle returning from an
• Latency – The time between when an interrupt is called and when the first ISR
• Nesting Interrupts – MPLAB C30 supports nested interrupts.
• Enabling/Disabling Interrupts – Enabling and disabling interrupt sources occurs
• Sharing Memory Between Interrupt Service Routines and Mainline Code –
• PSV Usage with Interrupt Service Routines – Using ISRs with managed psv
functions as Interrupt Service Routines (ISR’s) to be invoked by the occurrence of
an interrupt. For best performance in general, place lengthy calculations or opera-
tions that require library calls in the main application. This strategy optimizes
performance and minimizes the possibility of losing information when interrupt
events occur rapidly.
transfer application control when an interrupt occurs. An interrupt vector is a
dedicated location in program memory that specifies the address of an ISR.
Applications must contain valid function addresses in these locations to use
interrupts.
interrupt to code in the same conditional state as before the interrupt, context
information from specific registers must be saved.
instruction is executed is the latency of the interrupt.
at two levels: globally and individually.
How to mitigate potential hazards when this technique is used.
pointers and CodeGuard Security psv constant sections.
Chapter 7. Interrupts
USER’S GUIDE
MPLAB
DS51284F-page 91
®
C30