MAX17009GTL+T Maxim Integrated Products, MAX17009GTL+T Datasheet - Page 38

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MAX17009GTL+T

Manufacturer Part Number
MAX17009GTL+T
Description
IC CTLR VIDEO SERIAL DUAL 40TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX17009GTL+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
V
R
wide range, the minimum power dissipation occurs
where the resistive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R
package (i.e., one or two 8-pin SOs, DPAK, or D
and is reasonably priced. Make sure that the DL gate
driver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-
to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur (see the MOSFET Gate Drivers section).
Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at the
minimum input voltage:
where I
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side MOSFET
(N
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including verification
using a thermocouple mounted on N
where C
and I
(1A typ), and I
AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
38
IN(MIN)
DS(ON)
H
) due to switching losses is difficult since it must
PD NHSwitching
______________________________________________________________________________________
GATE
(
PD NH
LOAD
, consider reducing the size of N
RSS
to lower C
(
is the peak gate-drive source/sink current
is the per-phase current.
is the reverse transfer capacitance of N
Re
LOAD
DS(ON)
sistive
DS(ON)
)
GATE
is the per-phase current.
MOSFET Power Dissipation
=
)
(
required to stay within package
V
=
), comes in a moderate-sized
IN MAX
). If V
(
V
OUT
V
IN
IN
)
)
2
DS(ON)
I
does not vary over a
LOAD
C
H
RSS SW
I
GATE
:
2
) losses. High-
R
f
H
DS ON
H
), the worst-
(
(increasing
I
LOAD
)
2
PAK),
H
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
x V
MOSFET chosen for adequate R
voltages becomes extraordinarily hot when biased from
V
lower parasitic capacitance.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can “overdesign” the
circuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (D
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. As a gen-
eral rule, select a diode with a DC current rating equal
to 1/3 the load current per phase. This diode is optional
and can be removed if efficiency is not critical.
The boost capacitors (C
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1µF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
LOAD(MAX)
IN(MAX)
PD NL
IN
(
2
I
LOAD MAX
x f
Re
PEAK(MAX)
, consider choosing another MOSFET with
SW
sistive
(
but are not quite high enough to exceed
switching-loss equation. If the high-side
)
)
=
=
=
C
I
I
1
BST
PEAK MAX
PEAK MAX
is the maximum valley current
V
=
IN MAX
(
(
V
BST
N Q
OUT
(
200
×
) must be selected large
L
L
)
)
) with a forward voltage
), the worst-case power
GATE
)
mV
Δ
Boost Capacitors
DS(ON)
I
I
LOAD MAX
INDUCTOR
η
I
LOAD
TOTAL
2
(
2
at low-battery
)
2
LIR
R
DS ON
(
)

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