AD650 Analog Devices, Inc., AD650 Datasheet
AD650
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AD650 Summary of contents
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... The linearity error of the AD650 is typically 20 ppm (0.002% of full scale) and 50 ppm (0.005%) maximum at 10 kHz full scale. This corresponds to approximately 14-bit linearity in an analog- to-digital converter circuit ...
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... AD650 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 Product Description......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Circuit Operation ............................................................................. 7 Unipolar Configuration............................................................... 7 Component Selection................................................................... 8 Bipolar V/F .................................................................................. 10 Unipolar V/F, Negative Input Voltage ..................................... 10 REVISION HISTORY 3/06—Rev Rev. D Updated Format..................................................................Universal Changes to Product Highlights ...
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... S S −1 − (0.3 × 0.1 OS 250 250 0.4 100 36 0 Rev Page AD650 AD650S Max Min Typ Max 1 1 0.005 0.002 0.005 0.02 0.005 0.02 0.05 0.02 0.05 0.1 0.05 0.1 ± 5 ± 10 +0.015 −0.015 +0.015 ±75 ±75 ±150 ± ...
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... AD650J/AD650A AD650K/AD650B Typ Max Min Typ 100 ±18 ±9 8 +70 0 +85 −25 Rev Page AD650S Max Min Typ Max 100 100 ±18 ±9 ± +70 +85 −55 ...
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... V other conditions above those indicated in the operational ±V section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Indefinite ±V S Rev Page AD650 ...
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... Negative Power Supply Input. S The Capacitor, C for the one shot. No Connect. Frequency Output from AD650. Input to Comparator. When the input voltage reaches −0.6 V, the one shot is triggered. Digital Ground. Analog Ground. Positive Power Supply Input. ...
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... CIRCUIT OPERATION UNIPOLAR CONFIGURATION The AD650 is a charge balance voltage-to-frequency converter. In the connection diagram shown in Figure 4, or the block diagram of Figure 5, the input signal is converted into an equivalent current by the input resistance R exactly balanced by an internal feedback current delivered in short, timed bursts from the switched 1 mA internal current source ...
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... When the OS When the proper value for C architecture of the AD650 provides continuous integration of the input signal, therefore, large amounts of noise and interference can be rejected. If the output frequency is measured by counting pulses during a constant gate period, the integration provides infinite normal-mode rejection for frequencies corresponding to the gate period and its harmonics ...
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... INT (8) 100kHz 10kHz . This results OS . When INT INPUT RESISTOR 1000 100 20 Rev Page AD650 INPUT RESISTOR 16.9k 20k 40.2k 100k 50 100 1000 C (pF) OS Figure 9. Full-Scale Frequency vs 16.9k 20k 40.2k 100k ...
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... GΩ or higher. For V/F conversion of positive input signals using the connection diagram of Figure 4, the signal generator must be able to source the integration current to drive the AD650. For the negative V/F conversion circuit of Figure 12, the integration current is drawn from ground through R1 and R3, and the active input is high impedance. ...
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... INPUT 20kΩ OFFSET OP TRIM AMP 13 250kΩ 12 0.1µ 1mA –0.6V – OUT –V 1µ ONE 9 OUT SHOT COMP 510Ω 8 AD650 +15V ANALOG GND +V LOGIC F OUT F IN +5V +15V ANALOG GND PLANE DIGITAL GND +5V F OUT 0MHz TO 1MHz ...
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... RFI. There can also ground drop due to the difference in currents returned on the analog and digital grounds. This does not cause any problem. In fact, the AD650 tolerates as much as 0. potential difference between the analog and digital grounds. These features greatly ease power distribution and ground management in large systems ...
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... This means that the one-shot capacitor must decrease in value as temperature increases in order to compensate the gain TC of the AD650; that is, the capacitor must have −100 ppm/°C. Now consider the 1 MHz full-scale frequency. ...
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... V change out 16.7%. If the output frequency changes to 99.9 kHz, then the gain has changed 0.1% or 1000 ppm. The PSRR is 1000 ppm divided by 16.7%, which equals 60 ppm/%. The PSRR of the AD650 is a function of the full-scale operating 10V frequency. At low full-scale frequencies the PSRR is determined by the stability of the reference circuits in the device and can be very effective ...
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... Figure 19 shows the relationship between the bipolar offset current and the value of the resistor used to activate the source. µA 1000 800 600 400 200 500 1000 1500 Figure 19. Bipolar Offset Current vs. External Resistor Rev Page AD650 Ω 2000 2500 3000 3500 4000 EXTERNAL RESISTOR ...
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... All that is required is that the output voltage be known to be constant. Note also that the effect of the bias current at the inverting input of the AD650 op amp is also mulled in this circuit. The 1000 pF capacitor shunting the 200 kΩ resistor is compensation for the two amplifier servo loop. Two integrators in a loop require a single zero for compensation. The 3.6 kΩ ...
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... N” before being applied to the phase detector as feedback. Here and R . While it the oscillator frequency is forced to be equal to “N times” the INT IN reference frequency this frequency output that is the desired output signal and not a voltage. In this case, the AD650 offers compact size and wide dynamic range 1kΩ ...
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... In signal recovery applications of a PLL, the desired output signal is the voltage applied to the oscillator. In these situations, a linear relationship between the input frequency and the output voltage is desired; the AD650 makes a superb oscillator for FM demodulation. The wide dynamic range and outstanding linearity of the AD650 VFC allow simple embodiment of high performance analog signal isolation or telemetry systems ...
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... REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 24. 14-Lead Plastic Dual In-Line Package [PDIP] (N-14) Dimensions shown in inches and (millimeters) Rev Page 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.430 (10.92) MAX AD650 ...
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... AD650KNZ 150 typ 0.1% max AD650JP 150 typ 0.1% typ 1 AD650JPZ 150 typ 0.1% typ AD650AD 150 max 0.1% typ AD650BD 150 max 0.1% max AD650SD 200 max 0.1% max AD650SD/883B 200 max 0.1% max AD650ACHIPS Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...