ad1890jpz Analog Devices, Inc., ad1890jpz Datasheet

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ad1890jpz

Manufacturer Part Number
ad1890jpz
Description
Sampleport Stereo Asynchronous Sample Rate Converters
Manufacturer
Analog Devices, Inc.
Datasheet
a
PRODUCT OVERVIEW
The AD1890 and AD1891 SamplePorts™ are fully digital, stereo
Asynchronous Sample Rate Converters (ASRCs) that solve sample
rate interfacing and compatibility problems in digital audio equip-
ment. Conceptually, these converters interpolate the input data up
to a very high internal sample rate with a time resolution of 300 ps,
then decimate down to the desired output sample rate. The
AD1890 is intended for 18- and 20-bit professional applications,
and the AD1891 is intended for 16-bit lower cost applications
where large dynamic sample-rate changes are not encountered.
These devices are asynchronous because the frequency and phase
relationships between the input and output sample clocks (both are
inputs to the AD1890/AD1891 ASRCs) are arbitrary and need not
be related by a simple integer ratio. There is no need to explicitly
select or program the input and output sample clock frequencies, as
the AD1890/AD1891 automatically sense the relationship between
SamplePort and SamplePorts are trademarks of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Automatically Sense Sample Frequencies—No
Tolerant of Sample Clock Jitter
Smooth Transition When Sample Clock Frequencies
Accommodate Dynamically Changing Asynchronous
8 kHz to 56 kHz Sample Clock Frequency Range
1:2 to 2:1 Ratio Between Sample Clocks
–106 dB THD+N at 1 kHz (AD1890)
120 dB Dynamic Range (AD1890)
Optimal Clock Tracking Control
Linear Phase in All Modes
Equivalent of 4 Million 22-Bit FIR Filter Coefficients
Automatic Output Mute
Flexible Four Wire Serial Interfaces
Low Power
APPLICATIONS
Digital Mixing Consoles and Digital Audio Workstations
CD-R, DAT, DCC and MD Recorders
Multitrack Digital Audio and Video Tape Recorders
Studio to Transmitter Links
Digital Audio Signal Routers/Switches
Digital Audio Broadcast Equipment
High Quality D/A Converters
Digital Tape Recorder Varispeed Applications
Computer Communication and Multimedia Systems
Programming Required
Cross
Sample Clocks
–Short/Long Group Delay Modes
–Slow/Fast Settling Modes
Stored On-Chip
SamplePort Stereo Asynchronous
the two clocks. The input and output sample clock frequencies
can nominally range from 8 kHz to 56 kHz, and the ratio
between them can vary from 1:2 to 2:1.
The AD1890/AD1891 use multirate digital signal processing
techniques to construct an output sample stream from the input
sample stream. The input word width is 4 to 20 bits for the
AD1890 or 4 to 16 bits for the AD1891. Shorter input words
are automatically zero-filled in the LSBs. The output word
width for both devices is 24 bits. The user can receive as many
of the output bits as desired. Internal arithmetic is performed
with 22-bit coefficients and 27-bit accumulation. The digital
samples are processed with unity gain.
The input and output control signals allow for considerable flex-
ibility for interfacing to a variety of DSP chips, AES/EBU
receivers and transmitters and for I
and output data can be independently justified to the left/right
clock edge, or delayed by one bit clock from the left/right clock
edge. Input and output data can also be independently justified
to the word clock rising edge or delayed by one bit clock from
the word clock rising edge. The bit clocks can also be indepen-
dently configured for rising edge active or falling edge active
operation.
The AD1890/AD1891 SamplePort™ ASRCs have on-chip digi-
tal coefficients that correspond to a highly oversampled 0 kHz to
20 kHz low-pass filter with a flat passband, a very narrow tran-
sition band, and a high degree of stopband attenuation. A subset
of these filter coefficients are dynamically chosen on the basis of
the filtered instantaneous ratio between the input sample clock
(LR_I) and the output sample clock (LR_O), and these coeffi-
cients are used in an FIR convolver to perform the sample rate
conversion. Refer to the “Theory of Operation” section of this
data sheet for a more thorough functional description. The low-
pass filter has been designed so that full 20 kHz bandwidth is
maintained when the input and output sample clock frequencies
are as low as 44.1 kHz. If the output sample rate drops below
the input sample rate, the bandwidth of the input signal is
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
INPUT SAMPLE CLOCK
BROADCAST 32kHz
INPUT SERIAL DATA
FREQUENCIES:
CD 44.1kHz OR
DAT 48kHz OR
EXAMPLE
Sample Rate Converters
SYSTEM DIAGRAM
AD1890/
AD1890/AD1891
AD1891
2
S compatible devices. Input
OUTPUT SAMPLE CLOCK
OUTPUT SERIAL DATA
BROADCAST 32kHz
(continued on Page 4)
FREQUENCIES:
CD 44.1kHz OR
DAT 48kHz OR
EXAMPLE
Fax: 617/326-8703

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ad1890jpz Summary of contents

Page 1

... There is no need to explicitly select or program the input and output sample clock frequencies, as the AD1890/AD1891 automatically sense the relationship between SamplePort and SamplePorts are trademarks of Analog Devices, Inc. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable ...

Page 2

AD1890/AD1891–SPECIFICATIONS TEST CONDITIONS UNLESS OTHERWISE NOTED Supply Voltage +5.0 Ambient Temperature 25 MCLK 20 Load Capacitance 100 All minimums and maximums tested except as noted. PERFORMANCE (Guaranteed over 0 C AD1890 Dynamic Range ( kHz, –60 dB ...

Page 3

POWER ( MCLK = 16 MHz Supplies Voltage Current 5 Current 3 Dissipation Operation ( Operation ...

Page 4

AD1890/AD1891 (continued from Page 1) PRODUCT OVERVIEW (Continued) automatically limited to avoid alias distortion on the output sig- nal. The AD1890/AD1891 dynamically alter the low-pass filter cutoff frequency smoothly and slowly, so that real-time varia- tions in the sample rate ...

Page 5

DEFINITIONS Dynamic Range The ratio of a near full-scale input signal to the integrated noise in the passband ( kHz), expressed in decibels (dB). Dy- namic range is measured with a –60 dB input signal and “60 dB” ...

Page 6

AD1890/AD1891 Output Control Signals Pin Name Number I/O Description BKPOL_O 19 I Bit clock polarity. LO: Normal mode. Output data is valid on rising edges of BCLK_O, changed on falling. HI: Inverted mode. Output data is valid on falling edges ...

Page 7

THEORY OF OPERATION There are at least two logically equivalent methods of explaining the concept of asynchronous sample rate conversion: the high speed interpolation/decimation model and the polyphase filter bank model. Using the AD1890 and AD1891 SamplePorts does not require ...

Page 8

AD1890/AD1891 Polyphase Filter Bank Model Although less intuitively understandable than the interpolation/ decimation model, the polyphase filter bank model is useful to explore because it more accurately portrays the operation of the actual AD1890/AD1891 SamplePort hardware. In the polyphase filter ...

Page 9

AMP Figure 3. Four Polyphase Subfilters Realigned to Coarse Time Grid PARALLEL POLYPHASE FILTER BANK POLYPHASE FILTER 1 POLYPHASE FILTER 2 POLYPHASE FILTER 3 POLYPHASE FILTER 4 POLYPHASE FILTER 5 POLYPHASE FILTER 6 INPUT POLYPHASE FILTER 7 SIGNAL POLYPHASE FILTER ...

Page 10

AD1890/AD1891 Asynchronous sample rate conversion under the polyphase filter bank model is accomplished by selecting the output of a particu- lar polyphase filter on the basis of the temporal relationship be- tween the input sample clock and the output sample ...

Page 11

Sample Clock Jitter Rejection The loop filter settling time also affects the ability of the AD1890/AD1891 ASRCs to reject sample clock jitter, since the control loop effectively computes a time weighted average or “estimated” new output of many past input ...

Page 12

AD1890/AD1891 Cutoff Frequency Modification The final important operating concept of the ASRCs is the mod- ification of the filter cutoff frequency when the output sample rate (F ) drops below the input sample rate (F SOUT during downsampling operation. The ...

Page 13

OPERATING FEATURES Serial Input/Output Ports The AD1890/AD1891 use the frequency of the left/right input clock (LR_I) and the left/right output clock (LR_O) signals to determine the sample rate ratio, and therefore these signals must run continuously and transition twice per ...

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AD1890/AD1891 APPLICATION ISSUES Dither Due to the large output word length, no redithering of the AD1890/AD1891 output is necessary. This assumes that the input is properly dithered and the user retains the same or greater number of output bits as ...

Page 15

Multiple ASRC Synchronization and Performance Degradation Multiple parallel AD1890/AD1891 ASRCs may be used in a single system. Multiple AD1890/AD1891s can be “synchro- nized” by simply sharing the same reset and MCLK lines, and ensuring that all the ASRCs leave the ...

Page 16

AD1890/AD1891 Performance Graphs –60.00 –70.00 –80.00 –90.00 –100.0 –110.0 –120.0 –130.0 –140.0 –150.0 –160.0 20 100 FREQUENCY – Hz Figure 14a. AD1890—Dynamic Range from kHz, –60 dBFS, 48 kHz Input Sample Frequency, 44.1 kHz Output Sample ...

Page 17

FREQUENCY – Hz Figure 17a. AD1890—THD+N vs. Frequency, 48 kHz Input Sample Frequency, 44.1 kHz Output Sample Frequency, Full-Scale Input Signal –90.00 –95.00 –100.0 –105.0 –110.0 –115.0 –120.0 –125.0 ...

Page 18

AD1890/AD1891 0.0 –20.00 –40.00 –60.00 –80.00 –100.0 –120.0 –140 10k 12k FREQUENCY – Hz Figure 20a. AD1890—Twintone, 10 kHz and 11 kHz, 44.1 kHz Input Sample Frequency, 48 kHz Output Sample Frequency, 16k-Point FFT, BH4 ...

Page 19

BCLK_I, BCLK_O NORMAL MODE INPUT BCLK_I, BCLK_O INVERTED MODE LR_I, LR_O INPUT DATA IN/OUT MSB MSB-1 NO MSB DELAY MODE DATA IN/OUT MSB MSB–1 MSB–2 MSB DELAY MODE Figure 23. AD1890/AD1891 Serial Data Input and Output Timing, Left/ Right Clock ...

Page 20

AD1890/AD1891 28 PIN 1 1 0.250 (6.35) MAX 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.048 (1.21) 0.042 (1.07) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). N-28 28-Lead Plastic DIP 15 0.580 (14.73) 0.485 (12.32) 14 1.565 (39.70) ...

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