ad1890jpz Analog Devices, Inc., ad1890jpz Datasheet - Page 7

• Manufacturer Part Number: ad1890jpz
• Description: Sampleport Stereo Asynchronous Sample Rate Converters
• Manufacturer: Analog Devices, Inc.

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THEORY OF OPERATION
There are at least two logically equivalent methods of explaining
the concept of asynchronous sample rate conversion: the high
speed interpolation/decimation model and the polyphase filter
bank model. Using the AD1890 and AD1891 SamplePorts does
not require understanding either model. This section is included
for those who wish a deeper understanding of their operation.
Interpolation/Decimation Model
In the high speed interpolation/decimation model, illustrated in
Figure 1, the sampled data input signal (Plot A in Figure 1) is
interpolated at some ratio (IRATIO) by inserting IRATIO-1
zero valued samples between each of the original input signal
samples (Plot B in Figure 1). The frequency domain characteris-
tics of the input signal are unaltered by this operation, except
that the zero-padded sequence is considered to be sampled at a
frequency which is the product of original sampling frequency
multiplied by IRATIO.
The zero-padded values are fed into a digital FIR low-pass filter
(Plot C in Figure 1) to smooth or integrate the sequence, and
limit the bandwidth of the filter output to 20 kHz. The interpo-
lated output signal has been quantized to a much finer time
scale than the original sequence. The interpolated sequence is
then passed to a zero-order hold functional block (physically
SIGNAL
INPUT
A
Figure 1. Interpolation/Decimation Model—Time Domain View
A
B
C
D
E
AMP
INTERPOLATION
ZERO STUFF
B
FIR LOW
FILTER
PASS
–7–
C
implemented as a register, Plot D in Figure 1) and then asyn-
chronously resampled at the output sample frequency (Plot E in
Figure 1). This resampling can be thought of as a decimation
operation since only a very few samples out of the great many
interpolated samples are retained. The output values represent
the “nearest” values, in a temporal sense, produced by the inter-
polation operation. There is always some error in the output
sample amplitude due to the fact that the output sampling
switch does not close at a time that exactly corresponds to a
point on the fine time scale of the interpolated sequence. How-
ever, this error can be made arbitrarily small by using a very
large interpolation ratio. The AD1890/AD1891 SamplePort
ASRCs use an equivalent IRATIO of 65,536 to provide 16-bit
accuracy ( –96 dB THD+N) across the 0 to 20 kHz audio
band.
The number of FIR filter taps and associated coefficients is
approximately 4 million. The equivalent FIR filter convolution
frequency (or “upsample” frequency) is 3.2768 GHz, and the
fine time scale has resolution of about 300 ps. Various propri-
etary efficiencies are exploited in the AD1890/AD1891 ASRCs
to reduce the complexity and throughput requirements of the
hardware implied by this interpolation/decimation model.
ZERO ORDER
REGISTER
HOLD
D
RESAMPLING
DECIMATION
TIME
E
OUTPUT
SIGNAL
AD1890/AD1891