AD7225 Analog Devices, AD7225 Datasheet

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AD7225

Manufacturer Part Number
AD7225
Description
LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
Manufacturer
Analog Devices
Datasheet

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a
GENERAL DESCRIPTION
The AD7225 contains four 8-bit voltage output digital-to-
analog converters, with output buffer amplifiers and interface
logic on a single monolithic chip. Each D/A converter has a
separate reference input terminal. No external trims are re-
quired to achieve full specified performance for the part.
The double-buffered interface logic consists of two 8-bit regis-
ters per channel–an input register and a DAC register. Control
inputs A0 and A1 determine which input register is loaded when
WR goes low. Only the data held in the DAC registers deter-
mines the analog outputs of the converters. The double-
buffering allows simultaneous update of all four outputs under
control of LDAC. All logic inputs are TTL and CMOS (5 V)
level compatible and the control logic is speed compatible with
most 8-bit microprocessors.
Specified performance is guaranteed for input reference voltages
from +2 V to +12.5 V when using dual supplies. The part is also
specified for single supply operation using a reference of +10 V.
Each output buffer amplifier is capable of developing +10 V
across a 2 k load.
The AD7225 is fabricated on an all ion-implanted high-speed
Linear Compatible CMOS (LC
specifically developed to integrate high speed digital logic cir-
cuits and precision analog circuitry on the same chip.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Four 8-Bit DACs with Output Amplifiers
Separate Reference Input for Each DAC
Simultaneous Update of All Four Outputs
Operates with Single or Dual Supplies
Extended Temperature Range Operation
No User Trims Required
Skinny 24-Pin DIP, SOIC and 28-Terminal Surface
P Compatible with Double-Buffered Inputs
Mount Packages
2
MOS) process which has been
with Separate Reference Inputs
PRODUCT HIGHLIGHTS
1. DACs and Amplifiers on CMOS Chip
2. Single or Dual Supply Operation
3. Versatile Interface Logic
4. Separate Reference Input for Each DAC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
The single-chip design of four 8-bit DACs and amplifiers al-
lows a dramatic reduction in board space requirements and
offers increased reliability in systems using multiple convert-
ers. Its pinout is aimed at optimizing board layout with all
analog inputs and outputs at one end of the package and all
digital inputs at the other.
The voltage-mode configuration of the AD7225 allows single
supply operation. The part can also be operated with dual
supplies giving enhanced performance for some parameters.
The AD7225 has a common 8-bit data bus with individual
DAC latches, providing a versatile control architecture for
simple interface to microprocessors. The double-buffered in-
terface allows simultaneous update of the four outputs.
The AD7225 offers great flexibility in dealing with input sig-
nals with a separate reference input provided for each DAC
and each reference having variable input voltage capability.
FUNCTIONAL BLOCK DIAGRAM
LC
2
MOS Quad 8-Bit DAC
AD7225
Fax: 617/326-8703

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AD7225 Summary of contents

Page 1

... The part can also be operated with dual supplies giving enhanced performance for some parameters. 3. Versatile Interface Logic The AD7225 has a common 8-bit data bus with individual DAC latches, providing a versatile control architecture for simple interface to microprocessors. The double-buffered in- terface allows simultaneous update of the four outputs ...

Page 2

... AD7225–SPECIFICATIONS ( DUAL SUPPLY All specifications Parameter Versions STATIC PERFORMANCE Resolution 8 Total Unadjusted Error 2 Relative Accuracy 1 Differential Nonlinearity 1 Full-Scale Error 1 Full-Scale Temp. Coeff. 5 Zero Code Error @ MIN MAX Zero Code Error Temp Coeff. ...

Page 3

... ORDERING GUIDE Package 2 1 Model Option 2 LSB N-24 AD7225TQ 1 LSB N-24 AD7225UQ AD7225TE 2 LSB P-28A 1 LSB P-28A AD7225UE 2 LSB R-24 NOTES 1 LSB R- order MIL-STD-883 processed parts, add /883B to part number. Contact your 2 LSB Q-24 local sales office for military data sheet. ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7225 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... Figure 1. Channel-to-Channel Matching Figure 3. Differential Nonlinearity vs. V Figure 5. Zero Code Error vs. Temperature REV. B Typical Performance Characteristics– + Figure 2. Relative Accuracy vs. V Figure 4. Power Supply Current vs. Temperature REF Figure 6. Broadband Noise –5– AD7225 = –5 V unless otherwise noted. SS REF ...

Page 6

... The output voltages from the converters have the same polarity as the reference voltages, allowing single sup- ply operation. A novel DAC switch pair arrangement on the AD7225 allows a reference voltage range from + +12 each reference input. Each DAC consists of a highly stable, thin-film, R-2R ladder and eight high speed NMOS, single-pole, double-throw switches ...

Page 7

... WR occurs during LDAC), then LDAC must stay LOW for t or longer after WR goes HIGH to ensure correct data is latched through to the output. Table II shows the truth table for AD7225 operation. Figure 9 shows the input control logic for the part and the write cycle timing diagram is given in Figure 10. ...

Page 8

... Mismatch between R1 and R2 causes gain and offset errors and, therefore, these resistors must match and track over tempera- ture. Once again the AD7225 can be operated in single supply or from positive/negative supplies. Table IV shows the digital code versus output voltage relationship for the circuit of Figure 14 with R1 = R2. – ...

Page 9

... AGND BIAS The AD7225 AGND pin can be biased above system GND (AD7225 DGND) to provide an offset “zero” analog output voltage level. Figure 15 shows a circuit configuration to achieve this for channel A of the AD7225. The output voltage, V can be expressed as ...

Page 10

... V REF GAIN SET A 4-tap programmable transversal filter may be implemented using the AD7225 (Figure 18). The input signal is first sampled and converted to allow the tapped delay line function to be pro- vided by the Am29520. The multiplication of delayed input samples by fixed, programmable up weights is accomplished by the AD7225, the four coefficients or reference inputs being set by the digital codes stored in the AD7226 ...

Page 11

... D7 D0 Figure 25. AD7225 to 68008 Interface, Single-Buffered Mode V GENERATION SS Operating the AD7225 from dual supplies results in enhanced performance over single supply operation on a number of pa- A0 rameters as previously outlined. Some applications may require A1 this enhanced performance, but may only have a single power LDAC AD7225* supply rail available ...

Page 12

... AD7225 24-Pin Plastic (N-24) 24-Pin Cerdip (Q-24) 28-Lead PLCC (P-28A) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Ceramic Chip Carrier (E-28A) –12– 24-Lead SOIC (R-24) 28-Terminal Leadless REV. B ...

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