DP8570 NSC [National Semiconductor], DP8570 Datasheet
DP8570
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DP8570 Summary of contents
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... DP8570A Timer Clock Peripheral (TCP) General Description The DP8570A is intended for use in microprocessor based systems where information is required for multi-tasking data logging or general time of day date information This device is implemented in low voltage silicon gate microCMOS tech- nology to provide low standby power in battery back-up en- vironments The circuit’ ...
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Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage ( Input Voltage ( ...
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AC Electrical Characteristics PFAIL Symbol READ TIMING t Address Valid Prior to Read Strobe AR t Read Strobe Width (Note Chip Select to Data Valid ...
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Timing Waveforms Read Timing Diagram Write Timing Diagram 8638 – 8638 – 25 ...
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... General Description (Continued) The DP8570A’s interrupt structure provides four basic types of interrupts Periodic Alarm Compare Timer and Power Fail Interrupt mask and status registers enable the masking and easy determination of each interrupt One dedicated general purpose interrupt output is provided A second interrupt output is available on the Multiple Func- ...
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... Functional Description The DP8570A contains a fast access real time clock two 10 MHz 16-bit timers interrupt control logic power fail detect logic and CMOS RAM All functions of the TCP are con- trolled by a set of nine registers A simplified block diagram that shows the major functional blocks is given in Figure 1 ...
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... The first task to be carried out in an initialization routine is to start the oscillator by writing to the crystal select bits in the Real Time Mode Register If the DP8570A is configured for single supply mode an extra 50 A may be consumed until the crystal ...
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Functional Description (Continued) The oscillator is programmed via the Real Time Mode Reg- ister to operate at various frequencies The crystal oscillator is designed to offer optimum performance at each frequen- cy Thus at 32 768 kHz the oscillator is ...
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... DP8570A pro- vides circuitry to simplify design in battery backed systems This circuitry switches over to the back up supply and iso- lates the DP8570A from the host system Figure 6 shows a simplified block diagram of this circuitry which consists of three major sections 1) power loss logic 2) battery switch ...
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Functional Description (Continued) 10 ...
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... If a lock-out delay is enabled the DP8570A will remain active for 480 s after power fail is detected This ...
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... PFAIL pin) Thus writing a one to the Time Save bit enables both a software write or power fail write SINGLE POWER SUPPLY APPLICATIONS The DP8570A can be used in a single power supply applica- tion To achieve this the V pin must be connected to BB ...
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... The input frequency to the timers may be selected Each timer has a prescaler that gives a wide selection of clocking rates In addition the DP8570A has a single external clock input pin that can be selected for either of the timers Table IV shows the range of programmable clocks available and ...
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Functional Description (Continued) of the input data registers are loaded into the timer The output will stay high until the counter reaches zero At zero the output is reset The result is an output pulse whose du- ration is equal ...
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... Main Status Register It contains the page select bit and the register select bit as well as status information A memory map is shown in Figure 2 and register addressing in Table VII They show the name address and page loca- tions for the DP8570A 8638 – 13 ...
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... Functional Description (Continued) TABLE VII Register Counter RAM Addressing for DP8570A PS RS A0-4 Description (Note 1) (Note 2) CONTROL REGISTERS Main Status Register Timer 0 Control Register Timer 1 Control Register Periodic Flag Register Interrupt Routing Register Real Time Mode Register ...
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... D6 the oscillator reference is enabled thus the oscillator is referenced to V This allows operation in standard battery BB standby applications At initial power on if the DP8570A is going to be pro- grammed for battery backed mode the V connected to a potential in the range For single supply mode operation the V ...
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Functional Description (Continued) D5 The Delay Enable bit is used when a power fail occurs If this bit is set a 480 s delay is generated internally before the P interface is locked out This will enable the access the ...
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... Timer 0 Waveform 1 X Buffered Crystal Oscillator INTERRUPT CONTROL REGISTER 0 If battery backed mode is selected and the DP8570A is in standby ( then all bits are controlled the Real Time Mode Register D0–D5 These bits are used to enable one of the selected ...
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Control and Status Register Address Bit Map Main Status Register ADDRESS Page Register Timer 1 Select Select Interrupt Timer 0 Control Register PS 0 ...
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... Application Hints Suggested Initialization Procedure for DP8570A in bat- tery backed applications that use the Enter the test mode by writing bit D7 in the Period- ic Flag Register 2 Write zero to the RAM TEST mode Register located in page 0 address HEX 1F 3 Leave the test mode by writing bit D7 in the Period- ...
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Appendix A FIGURE A1 Typical Interface Where the ‘‘Write Strobe’’ is Synchronized to the Decrementing Clock of the Timer 8638– 30 ...
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Typical Performance Characteristics Operating Current vs Supply Voltage (Single Supply Mode F 32 768 kHz) e OSC Standby Current vs Power Supply Voltage (F 32 768 kHz) e OSC Operating Current vs Supply Voltage (Battery Backed Mode F e OSC ...
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24 ...
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... Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number DP8570AN NS Package Number N28B 25 ...
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... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Chip Carrier Package (V) Order Number DP8570AV NS Package Number V28A 2 A critical component is any component of a life ...