ICS650R-11I IDT, Integrated Device Technology Inc, ICS650R-11I Datasheet
ICS650R-11I
Specifications of ICS650R-11I
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ICS650R-11I Summary of contents
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Description The ICS650-11C is a low-cost, low-jitter, high-performance clock synthesizer optimized for Alcatel system requirements. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 17.664 MHz crystal input to produce up to five output clocks. Block Diagram ...
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Pin Assignment SB0 VDD 4 17 SB1 5 16 GND 6 15 59.23M 7 14 80M/78. 70.6M/50.78M 10 11 20-pin (150 mil) SSOP Pin Descriptions Pin Pin ...
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External Components Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS650-11C must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between each VDD and the PCB ground plane. Series ...
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Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS650-11C. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any ...
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AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V, Ambient Temperature -40 to +85 C Parameter Input Crystal or Clock Frequency Output Clocks Accuracy (synthesis error) Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Cycle-to-cycle ...
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Package Outline and Package Dimensions Package dimensions are kept current with JEDEC Publication No INDEX AREA Ordering Information Part / Order Number Marking 650R-11ILF 650R-11ILF 650R-11ILFT 650R-11ILF While the information presented herein has ...