ISL23711 Intersil Corporation, ISL23711 Datasheet
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ISL23711
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ISL23711 Summary of contents
Page 1
... Terminal Voltage ±3V or ±5V, 128 Taps I Serial Interface The Intersil ISL23711 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, and a control section. The wiper position is 2 controlled interface. The potentiometer is implemented by a resistor array composed of 127 resistive elements and a wiper switching network ...
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... V- 3 GND SCL 2 ISL23711 7-BIT SDA WIPER REGISTER SCL (VOLATILE RECALL CONTROL CIRCUITRY A1 SLAVE ADDRESS A0 DECODE 2 Data I/O for I C serial interface. It has an open drain output and may be wire ORed with other open drain active low outputs ...
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... RINL Integral Non-linearity (Note 11) RDNL Differential Non-linearity (Note 10) Roffset Offset (Note 9) TC Resistance Temperature Coefficient R (Notes 12, 13) 3 ISL23711 Thermal Information Thermal Resistance (Typical, Note 3) MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V CC Recommended Operating Conditions Temperature Range (Industrial .-40°C to +85° 2. -2.7V to -5.5V CC TEST CONDITIONS W option U option V- = -5.5V ...
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... Input Data Setup Time SU:DAT t Input Data Hold Time HD:DAT t STOP Condition Setup Time SU:STO t STOP Condition Setup Time HD:STO 4 ISL23711 TEST CONDITIONS 400kHz; SDA = Open; (for I C, Active, SCL Read and Write states only 400kHz; SDA = Open; (for I C, Active, SCL ...
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... TIMING) SDA (OUTPUT TIMING) A0, A1 Pin Timing START SCL SDA IN t SU:A A0 ISL23711 TEST CONDITIONS From SCL falling edge crossing 30 SDA enters the 30 From 30 From 70 Total on-chip and off-chip Maximum is determined For Cb = 400pF, max is about 2~2.5kΩ ...
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... ISL23711. A maximum of 4 ISL23711 devices may occupy 2 the I Principles of Operation and R references the H The ISL23711 is an integrated circuit incorporating one DCP with It’s associated register, and an I providing direct communication between a host and the potentiometer and memory. The resistor array is comprised 2 C external master 2 C serial interface ...
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... R increases monotonically, while the W L resistance between R and R decreases monotonically While the ISL23711 is being powered up, the WR is reset to 20h (64 decimal), which locates the R between R and The WR can be read or written directly using the I interface as described in the following sections. Memory Description • ...
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... SDA OUTPUT FROM RECEIVER START FIGURE 2. ACKNOWLEDGE RESPONSE FROM RECEIVER S SIGNALS FROM T THE MASTER A IDENTIFICATION R T SIGNAL AT SDA 0 SIGNALS FROM THE ISL23711 FIGURE 3. BYTE WRITE SEQUENCE SIGNALS FROM THE MASTER SIGNAL AT SDA SIGNALS FROM THE SLAVE 8 ISL23711 DATA DATA DATA STABLE CHANGE ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 ISL23711 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE SYMBOL ...