ESD5Z3.3T1G ON Semiconductor, ESD5Z3.3T1G Datasheet - Page 3

TVS ESD ASD 158W 3.3V SOD-523

ESD5Z3.3T1G

Manufacturer Part Number
ESD5Z3.3T1G
Description
TVS ESD ASD 158W 3.3V SOD-523
Manufacturer
ON Semiconductor
Type
TVSr
Datasheet

Specifications of ESD5Z3.3T1G

Voltage - Reverse Standoff (typ)
3.3V
Voltage - Breakdown
5V
Power (watts)
158W
Polarization
Unidirectional
Mounting Type
Surface Mount
Package / Case
SOD-523
Capacitance Value
105(Typ) pF
Maximum Clamping Voltage
14.1 V
Direction Type
Uni-Directional
Number Of Elements Per Chip
1
Esd Protection Voltage
±30@Air Gap|±30@Contact Disc KV
Maximum Leakage Current
0.05 uA
Maximum Working Voltage
3.3 V
Polarity
Unidirectional
Channels
1 Channel
Clamping Voltage
14.1 V
Operating Voltage
3.3 V
Breakdown Voltage
5 V
Peak Surge Current
11.2 A
Peak Pulse Power Dissipation
200 W
Capacitance
105 pF
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 55 C
Dimensions
0.8 mm W x 1.2 mm L
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ESD5Z3.3T1G
ESD5Z3.3T1GOSTR

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The following is taken from Application Note
AND8308/D - Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000-4-2 waveform. Since the
IEC61000-4-2 was written as a pass/fail spec for larger
IEC 61000-4-2 Spec.
Level
For sensitive circuit elements it is important to limit the
1
2
3
4
ESD Gun
Voltage
Test
(kV)
2
4
6
8
First Peak
Current
22.5
(A)
7.5
15
30
Current at
TVS
30 ns (A)
100
90
80
70
60
50
40
30
20
10
0
12
16
4
8
0
Figure 4. Diagram of ESD Test Setup
t
Cable
50 W
r
t
Figure 5. 8 X 20 ms Pulse Waveform
P
Figure 3. IEC61000-4-2 Spec
Current at
60 ns (A)
ESD5Z2.5T1 SERIES
PEAK VALUE I
20
2
4
6
8
http://onsemi.com
Oscilloscope
HALF VALUE I
50 W
t, TIME (ms)
3
RSM
PULSE WIDTH (t
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
40
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
100%
@ 8 ms
I
peak
90%
10%
I @ 30 ns
I @ 60 ns
RSM
/2 @ 20 ms
IEC61000-4-2 Waveform
P
) IS DEFINED
60
t
P
= 0.7 ns to 1 ns
80

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