ATTINY45V-10MU Atmel, ATTINY45V-10MU Datasheet - Page 90

• Manufacturer Part Number: ATTINY45V-10MU
• Description: IC AVR MCU FLASH 4K 10MHZ 20MLF
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY45V-10MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 20MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 10 MHz
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

90
ATtiny25/45/85
Figure 12-5. Effects of Unsynchronized OCR Latching
During the time between the write and the latch operation, a read from OCR1A or OCR1B will
read the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A or OCR1B.
When OCR1A or OCR1B contain $00 or the top value, as specified in OCR1C register, the out-
p u t P B 1 ( O C 1 A ) o r P B 4 ( O C 1 B ) i s h e l d l o w o r h i g h a c c o r d i n g t o t h e s e t t i n g s o f
COM1A1/COM1A0. This is shown in
Table 12-2.
In PWM mode, the Timer Overflow Flag - TOV1 is set when the TCNT1 counts to the OCR1C
value and the TCNT1 is reset to $00. The Timer Overflow Interrupt1 is executed when TOV1 is
set provided that Timer Overflow Interrupt and global interrupts are enabled. This also applies to
the Timer Output Compare flags and interrupts.
The frequency of the PWM will be Timer Clock 1 Frequency divided by (OCR1C value + 1). See
the following equation:
Resolution shows how many bits are required to express the value in the OCR1C register and
can be calculated using the following equation:
COM1x1
0
0
1
1
1
1
Unsynchronized OC1x Latch
Synchronized OC1x Latch
PWM Outputs OCR1x = $00 or OCR1C, x = A or B
COM1x0
1
1
0
0
1
1
f
OCR1C
OCR1C
OCR1C
OCR1x
Table
PWM
$00
$00
$00
=
12-2.
----------------------------------- -
(
OCR1C + 1
Glitch
f
Compare Value changes
Compare Value changes
TCK1
Output OC1x
)
H
H
H
L
L
L
Counter Value
Compare Value
PWM Output OC1x
Counter Value
Compare Value
PWM Output OC1x
Not connected.
Not connected.
Not connected.
Not connected.
Output OC1x
2586M–AVR–07/10
H
L