PIC18F25J10-I/ML Microchip Technology, PIC18F25J10-I/ML Datasheet - Page 3

IC PIC MCU FLASH 16KX16 28QFN

PIC18F25J10-I/ML

Manufacturer Part Number
PIC18F25J10-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F25J10-I/ML

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MHz
No. Of Timers
3
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PXLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
1. Asynchronous Counter
EXAMPLE 1:
 2010 Microchip Technology Inc.
Update:
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
When Timer1 is started or updated, the timer
needs to see a falling edge from the external clock
source before a rising edge can increment the
counter. If writes to TMR1H and TMR1L are not
completed while the external clock pulse is still
high, Timer1 will miss counting the first clock pulse
after the update.
When using an external crystal, the pulse width
from rising to falling edge is temperature depen-
dent and may decrease with temperature. As a
result, the timer may require an additional oscilla-
tion to overflow.
Code examples are given for the affected devices:
• PIC12/14/16/17 devices – Example 1 and
• PIC18 devices – Example 3
Both examples include code to wait for Timer1 to
increment twice between the RTCisr and Update
labels.
BTFSC
GOTO
BTFSS
GOTO
BCF
BSF
BCF
BSF
BSF
Example 2
TMR1L,0
$-1
TMR1L,0
$-1
T1CON,TMR1CS
TMR1H,7
T1CON,TMR1ON
T1CON,TMR1C
T1CON,TMR1ON
PIC12/14/16/17 CODE EXAMPLE FOR 1 SECOND OVERFLOW PERIOD WITH 32.786
kHZ OSCILLATOR
;Timer has just incremented, 31 μs before next rising edge to
;complete reload
;Select system clock for Timer1
;Timer1 high byte 0x80
;Timer1 off
;Select external crystal
;Timer1 on
In PIC18 devices, it is not possible to reliably
update Timer1 in a low-priority interrupt. A high-
priority interrupt could occur at any time and
unexpectedly delay the TMR1 update.
PIC18 devices also include Timer3 which is
functionally identical to Timer1.
Work around
Switching Timer1 to the main system oscillator
after reloading, the timer ensures the timer will see
a falling edge before switching back to the external
clock source.
Due to the time from Timer1 overflow to the reload
being application specific, wait for the timer to
increment before beginning the reload sequence.
This ensures the timer does not miss a rising edge
during reload. The timing of the clock source
changing is critical and is detailed in Example 1
and Example 2.
TIMER1 MODULE
DS80329B-page 3

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