PIC18F24K20-E/SO Microchip Technology, PIC18F24K20-E/SO Datasheet - Page 12

• Manufacturer Part Number: PIC18F24K20-E/SO
• Description: IC PIC MCU FLASH 8KX16 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F24K20-E/SO

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F24K20/25K20/44K20/45K20
APPENDIX A:
Rev A Document (12/2008)
Initial release of this document.
Rev B Document (05/2009)
Updated Errata to new format; Added Module 11:
PORTB and Module 12: ADC; minor edits.
Clarifications/Corrections to the Data Sheet: Added
Module 1: MSSP; Module 2: Electrical Specifications;
Module 3: Electrical Specifications.
Rev C Document (06/2009)
Clarifications/Corrections to the Data Sheet:
Deleted Module 1: MSSP: Figure 17-17 Baud Rate
Generator Block Diagram, updating subsequent num-
bering. Added Module 3 MSSP: Register 17-3
SSPADD; Added Module 4 MSSP: Section 17.4.2
Operation; Added Module 5 MSSP: Figure 17-16
MSSP Block Diagram; Added Module 6 MSSP: Sec-
tions 17.4.7.1, 17.4.8, 17.4.9, 17.4.17.1, 17.4.17.2,
17.4.17.3: SSPADD, changing <6:0> to <7:0>.
Rev D Document (11/2009)
Updated to add revision 0x1B.
Data Sheet Clarifications: Deleted Modules 1, 2, 3, 4,
5, 6.
Rev E Document (04/2010)
Updated to include early revisions of silicon, revision
IDs 0xA through 0x11. These early revisions were
described in DS80366 errata, which is now obsolete.
Rev F Document (05/2010)
Updated Table 1.
Rev G Document (07/2010)
Removed ADC Work around #2 and changed #3 to #2
(Module 28).
DS80425G-page 12
DOCUMENT
REVISION HISTORY
 2010 Microchip Technology Inc.