AT89LP4052-20XU Atmel, AT89LP4052-20XU Datasheet - Page 31

• Manufacturer Part Number: AT89LP4052-20XU
• Description: IC 8051 MCU FLASH 4K 20TSSOP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP4052-20XU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89ISP
• Minimum Operating Temperature: - 40 C
• Package: 20TSSOP
• Device Core: 8051
• Family Name: AT89
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

18. Serial Interface
18.1
3547J–MICRO–10/09
Multiprocessor Communications
and a low in the next cycle, interrupt request flag IEx in TCON is set. Flag bit IEx then requests
the interrupt. Since the external interrupt pins are sampled once each clock cycle, an input high
or low should hold for at least 2 oscillator periods to ensure sampling. If the external interrupt is
transition-activated, the external source has to hold the request pin high for at least two clock
cycles, and then hold it low for at least two clock cycles to ensure that the transition is seen so
that interrupt request flag IEx will be set. IEx will be automatically cleared by the CPU when the
service routine is called if generated in edge-triggered mode. If the external interrupt is level-acti-
vated, the external source has to hold the request active until the requested interrupt is actually
generated. Then the external source must deactivate the request before the interrupt service
routine is completed, or else another interrupt will be generated.
The serial port is full-duplex, which means it can transmit and receive simultaneously. It is also
receive-buffered, which means it can begin receiving a second byte before a previously received
byte has been read from the receive register. (However, if the first byte still has not been read
when reception of the second byte is complete, the first byte will be lost.) The serial port receive
and transmit registers are both accessed at Special Function Register SBUF. Writing to SBUF
loads the transmit register, and reading SBUF accesses a physically separate receive register.
The serial port can operate in the following four modes.
Mode 0: Half-Duplex serial data enters or exits through RXD. TXD outputs the shift clock. Eight
data bits are transmitted/received, with the LSB first. The baud rate is fixed at 1/2 the oscillator
frequency.
Mode 1: 10 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data
bits (LSB first), and a stop bit (1). On receive, the stop bit goes into RB8 in Special Function
Register SCON. The baud rate is variable based on Timer 1 overflow.
Mode 2: 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data
bits (LSB first), a programmable ninth data bit, and a stop bit (1). On transmit, the 9th data bit
(TB8 in SCON) can be assigned the value of “0” or “1”. For example, the parity bit (P, in the
PSW) can be moved into TB8. On receive, the 9th data bit goes into RB8 in Special Function
Register SCON, while the stop bit is ignored. The baud rate is programmable to either 1/16 or
1/32 the oscillator frequency.
Mode 3: 11 bits are transmitted (through TXD) or received (through RXD): a start bit (0), 8 data
bits (LSB first), a programmable ninth data bit, and a stop bit (1). In fact, Mode 3 is the same as
Mode 2 in all respects except the baud rate, which in Mode 3 is variable based on Timer 1
overflow.
In all four modes, transmission is initiated by any instruction that uses SBUF as a destination
register. Reception is initiated in Mode 0 by the condition RI = 0 and REN = 1. Reception is initi-
ated in the other modes by the incoming start bit if REN = 1.
Modes 2 and 3 have a special provision for multiprocessor communications. In these modes, 9
data bits are received, followed by a stop bit. The ninth bit goes into RB8. Then comes a stop bit.
The port can be programmed such that when the stop bit is received, the serial port interrupt is
activated only if RB8 = 1. This feature is enabled by setting bit SM2 in SCON.
The following example shows how to use the serial interrupt for multiprocessor communications.
When the master processor must transmit a block of data to one of several slaves, it first sends
AT89LP2052/LP4052
31