ATMEGA48V-10PU Atmel, ATMEGA48V-10PU Datasheet - Page 99

• Manufacturer Part Number: ATMEGA48V-10PU
• Description: IC AVR MCU 4K 10MHZ 1.8V 28DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48V-10PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire/SPI/USART/Serial
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Package: 28PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 10 MHz
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2545S–AVR–07/10
Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
Figure 14-11
PWM mode where OCR0A is TOP.
Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
TCNTn
TCNTn
(clk
(clk
OCRnx
OCRnx
OCFnx
(CTC)
OCFnx
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/8)
/8)
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast
caler (f
clk_I/O
OCRnx - 1
TOP - 1
/8)
OCRnx
TOP
OCRnx Value
TOP
ATmega48/88/168
OCRnx + 1
BOTTOM
BOTTOM + 1
OCRnx + 2
clk_I/O
/8)
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