PIC18F45K20-E/PT Microchip Technology, PIC18F45K20-E/PT Datasheet - Page 28

• Manufacturer Part Number: PIC18F45K20-E/PT
• Description: IC PIC MCU FLASH 16KX16 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K20-E/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1536Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 36
• Interface Type: I2C/SPI/USART
• On-chip Adc: 14-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2XK20/4XK20
5.0
The PIC18F2XK20/4XK20 devices have several
Configuration Words. These bits can be set or cleared
to select various device configurations. All other mem-
ory areas should be programmed and verified prior to
setting Configuration Words. These bits may be read
out normally, even after read or code protection. See
Table 5-1 for a list of Configuration bits and device IDs
and Table 5-3 for the Configuration bit descriptions.
5.1
A user may store identification information (ID) in eight
ID locations mapped in 200000h:200007h. It is recom-
mended that the Most Significant nibble of each ID be
Fh. In doing so, if the user code inadvertently tries to
execute from the ID space, the ID data will execute as
a NOP.
TABLE 5-1:
DS41297F-page 28
300001h
300002h
300003h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend:
Note 1:
File Name
2:
CONFIGURATION WORD
User ID Locations
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
DEVID1
DEVID2
x = unknown, u = unchanged, – = unimplemented. Shaded cells are unimplemented, read as ‘0’.
These bits are only implemented on specific devices. Refer to Section 2.3 “Memory Maps” to determine which bits
apply based on available memory.
DEVID registers are read-only and cannot be programmed by the user.
CONFIGURATION BITS AND DEVICE IDs
(2)
(2)
MCLRE
DEBUG
DEV10
WRTD
DEV2
IESO
Bit 7
CPD
—
—
—
—
—
—
FCMEN
EBTRB
XINST
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
Advance Information
WRTC
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
—
—
—
WDTPS3 WDTPS2 WDTPS1 WDTPS0 WDTEN
BORV1
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
—
EBTR3
HFOFST LPT1OSC PBADEN CCP2MX
WRT3
BORV0
5.2
The device ID word for the PIC18F2XK20/4XK20
devices is located at 3FFFFEh:3FFFFFh. These bits
may be used by the programmer to identify what device
type is being programmed and read out normally, even
after code or read protection. See Table 5-2 for a
complete list of device ID values.
FIGURE 5-1:
FOSC3
CP3
REV3
DEV6
Bit 3
—
—
—
—
(1)
(1)
(1)
Device ID Word
EBTR2
BOREN1 BOREN0 PWRTEN
WRT2
FOSC2
CP2
REV2
DEV5
Bit 2
LVP
—
—
—
(1)
(1)
(1)
Set TBLPTR = 3FFFFE
with Post-Increment
with Post-Increment
Read High Byte
FOSC1
EBTR1
Read Low Byte
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
READ DEVICE ID WORD
FLOW
© 2009 Microchip Technology Inc.
Done
Start
STVREN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
Unprogrammed
See Table 5-2
See Table 5-2
00-- 0111
---1 1111
---1 1111
1--- 1011
10-- -1-1
---- 1111
11-- ----
---- 1111
111- ----
---- 1111
-1-- ----
Default/
Value