PIC16F913-I/SS Microchip Technology, PIC16F913-I/SS Datasheet - Page 12

IC PIC MCU FLASH 4KX14 28SSOP

PIC16F913-I/SS

Manufacturer Part Number
PIC16F913-I/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F913-I/SS

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Ram Size
352 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / Rohs Status
 Details

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Quantity
Price
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PIC16F91X/946
3.1.6
The ICSPCLK pin is used as a clock input and the
ICSPDAT pin is used for entering command bits and
data input/output during serial operation. To input a
command, ICSPCLK is cycled six times. Each
command bit is latched on the falling edge of the clock
with the LSb of the command being input first. The data
input onto the ICSPDAT pin is required to have a
minimum setup and hold time (see Table 6-1), with
respect to the falling edge of the clock. Commands that
have data associated with them (Read and Load) are
specified to have a minimum delay of T
the command and the data. After this delay, the clock
pin is cycled 16 times with the first cycle being a Start
bit and the last cycle being a Stop bit.
TABLE 3-1:
DS41244F-page 12
Load Configuration
Load Data For Program Memory
Load Data For Data Memory
Read Data From Program Memory
Read Data From Data Memory
Increment Address
Begin Programming
Begin Programming
End Programming
Bulk Erase Program Memory
Bulk Erase Data Memory
Row Erase Program Memory
SERIAL PROGRAM/VERIFY
OPERATION
Command
COMMAND MAPPING FOR PIC16F91X/946
DLY
1 between
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
1
0
x
x
1
Mapping (MSb … LSb)
0
0
0
0
0
0
1
1
1
1
1
0
During a read operation, the LSb will be transmitted
onto the ICSPDAT pin on the rising edge of the second
cycle. For a load operation, the LSb will be latched on
the falling edge of the second cycle. A minimum T
delay
commands,
command, which requires a T
All commands and data words are transmitted LSb first.
Data is transmitted on the rising edge and latched on
the falling edge of the ICSPCLK. To allow for decoding
of commands and reversal of data pin configuration, a
time separation of at least T
command and a data word.
The commands that are available are described in
Table 3-1.
0
0
0
1
1
1
0
0
0
0
0
0
is
also
except
0
1
1
0
0
1
0
0
1
0
1
0
specified
0
0
1
0
1
0
0
0
0
1
1
1
for
© 2009 Microchip Technology Inc.
DLY
0, data (14), 0
0, data (14), 0
0, data (8), zero (6), 0
0, data (14), 0
0, data (8), zero (6), 0
Internally Timed
Externally Timed
Internally Timed
Internally Timed
Internally Timed
the
DIS
between
1 is required between a
.
End
Data
Programming
consecutive
DLY
1

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