PIC18F26K20-I/SP Microchip Technology, PIC18F26K20-I/SP Datasheet - Page 7

• Manufacturer Part Number: PIC18F26K20-I/SP
• Description: IC PIC MCU FLASH 32KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Rev A Document (9/2008)
Initial release of this document.
Rev B Document (5/2009)
Updated Errata to new format.
Added Module 5. MSSP Master I
Module 6. EUSART; Added Module 12. ADC.
Clarifications/Corrections to the Data Sheet:
Removed Modules 1-3.
Rev C Document (6/2009)
Revised Table 1: Silicon DEVREV Values.
Clarifications/Corrections to the Data Sheet: Added
Module 1: Electrical Specifications; Added Module 2:
Electrical Specifications; Added Module 3 MSSP: Reg-
ister 17-3 SSPADD; Added Module 4 MSSP: Section
17.4.2 Operation; Added Module 5 MSSP: Figure 17-
16 MSSP Block Diagram; Added Module 6 MSSP: Sec-
tions 17.4.7.1, 17.4.8, 17.4.9, 17.4.17.1, 17.4.17.2,
17.4.17.3: SSPADD, changing <6:0> to <7:0>.
Rev D Document (3/2010)
Silicon Errata Issues: Added Module 13; Updated Table
2.
Data Sheet Clarifications:
Removed Modules 1-6.
Rev E Document (7/2010)
Removed ADC Work around #2 and changed #3 to #2
(Module 12).
 2010 Microchip Technology Inc.
DOCUMENT
REVISION HISTORY
2
C Mode; Added
PIC18F26K20/46K20
DS80404E-page 7