PIC18F26K20-I/SP Microchip Technology, PIC18F26K20-I/SP Datasheet - Page 25

IC PIC MCU FLASH 32KX16 28-DIP

PIC18F26K20-I/SP

Manufacturer Part Number
PIC18F26K20-I/SP
Description
IC PIC MCU FLASH 32KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26K20-I/SP

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K20-I/SP
Manufacturer:
HITACHI
Quantity:
101
4.2
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. Memory reads occur a single byte
at a time, so two bytes must be read to compare
against the word in the programmer’s buffer. Refer to
Section 4.1 “Read Code Memory, ID Locations and
Configuration Bits” for implementation details of
reading code memory.
FIGURE 4-2:
© 2009 Microchip Technology Inc.
Verify Code Memory and ID
Locations
No
with Post-increment
with Post-increment
Set TBLPTR = 0
Read High Byte
Read Low Byte
Word = Expect
code memory
verified?
data?
Does
VERIFY CODE MEMORY FLOW
Start
All
Yes
Yes
No
Failure,
Report
Error
Advance Information
Increment
Pointer
The Table Pointer must be manually set to 200000h
(base address of the ID locations) once the code
memory has been verified. The post-increment feature
of the table read 4-bit command can not be used to
increment the Table Pointer beyond the code memory
space. In a 64-Kbyte device, for example, a post-incre-
ment read of address FFFFh will wrap the Table Pointer
back to 000000h, rather than point to unimplemented
address 010000h.
PIC18F2XK20/4XK20
No
Set TBLPTR = 200000h
with Post-Increment
with Post-Increment
Read High byte
Read Low Byte
Word = Expect
ID locations
verified?
data?
Done
Does
All
Yes
Yes
No
DS41297F-page 25
Failure,
Report
Error

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