ATMEGA8A-MU Atmel, ATMEGA8A-MU Datasheet - Page 222

• Manufacturer Part Number: ATMEGA8A-MU
• Description: MCU AVR 8K FLASH 16MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8A-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8159D–AVR–02/11
Rdloop:
Return:
ready yet
Do_spm:
Wait_spm:
Wait_ee:
adiw ZH:ZL, 2
sbiw loophi:looplo, 2
brne Wrloop
; execute page write
subi ZL, low(PAGESIZEB)
sbci ZH, high(PAGESIZEB)
ldi
rcallDo_spm
; re-enable the RWW section
ldi
rcallDo_spm
; read back and check, optional
ldi
ldi
subi YL, low(PAGESIZEB)
sbci YH, high(PAGESIZEB)
lpm
ld
cpse r0, r1
rjmp Error
sbiw loophi:looplo, 1
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
in
sbrs temp1, RWWSB
ret
; re-enable the RWW section
ldi
rcallDo_spm
rjmp Return
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
spmcrval, (1<<PGWRT) | (1<<SPMEN)
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
looplo, low(PAGESIZEB)
loophi, high(PAGESIZEB)
r0, Z+
r1, Y+
temp1, SPMCR
spmcrval, (1<<RWWSRE) | (1<<SPMEN)
temp1, SPMCR
temp2, SREG
SPMCR, spmcrval
SREG, temp2
; If RWWSB is set, the RWW section is not
;use subi for PAGESIZEB<=256
;restore pointer
;not required for PAGESIZEB<=256
;init loop variable
;not required for PAGESIZEB<=256
;restore pointer
;use subi for PAGESIZEB<=256
ATmega8A
222