PIC16C620-04I/SO Microchip Technology, PIC16C620-04I/SO Datasheet - Page 16

IC MCU OTP 512X14 COMP 18SOIC

PIC16C620-04I/SO

Manufacturer Part Number
PIC16C620-04I/SO
Description
IC MCU OTP 512X14 COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C620-04I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1075 - ADAPTER 18-SOIC TO 18-SOICAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PIC16C62X
4.2
The data memory (Figure 4-4, Figure 4-5, Figure 4-6
and Figure 4-7) is partitioned into two banks, which
contain the General Purpose Registers and the Special
Function Registers. Bank 0 is selected when the RP0
bit is cleared. Bank 1 is selected when the RP0 bit
(STATUS <5>) is set. The Special Function Registers
are located in the first 32 locations of each bank.
Register
PIC16C620A/CR620A/621A and 20-7Fh (Bank0) and
A0-BFh (Bank1) on the PIC16C622 and PIC16C622A
are General Purpose Registers implemented as static
RAM. Some Special Purpose Registers are mapped in
Bank 1.
Addresses F0h-FFh of bank1 are implemented as
common ram and mapped back to addresses 70h-7Fh
in bank0 on the PIC16C620A/621A/622A/CR620A.
DS30235J-page 14
Data Memory Organization
locations
20-7Fh
(Bank0)
on
the
4.2.1
The register file is organized as 80 x 8 in the
PIC16C620/621, 96 x 8 in the PIC16C620A/621A/
CR620A and 128 x 8 in the PIC16C622(A). Each is
accessed either directly or indirectly through the File
Select Register FSR (Section 4.4).
GENERAL PURPOSE REGISTER
FILE
 2003 Microchip Technology Inc.

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