DSPIC33FJ16GS402-I/MM Microchip Technology, DSPIC33FJ16GS402-I/MM Datasheet - Page 188

IC DSPIC MCU/DSP 16K 28-QFN

DSPIC33FJ16GS402-I/MM

Manufacturer Part Number
DSPIC33FJ16GS402-I/MM
Description
IC DSPIC MCU/DSP 16K 28-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS402-I/MM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
The Timer2/3 module can operate in one of the
following modes:
• Timer mode
• Gated Timer mode
• Synchronous Counter mode
In Timer and Gated Timer modes, the input clock is
derived from the internal instruction cycle clock (F
In Synchronous Counter mode, the input clock is
derived from the external clock input at the TxCK pin.
The timer modes are determined by the following bits:
• TCS (TxCON<1>): Timer Clock Source Control bit
• TGATE (TxCON<6>): Timer Gate Control bit
Timer control bit settings for different operating modes
are given in the Table 12-1.
TABLE 12-1:
12.1
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
12.2
A 32-bit timer module can be formed by combining a
Type B and a Type C 16-bit timer module. For 32-bit
timer operation, the T32 control bit in the Type B Timer
Control (TxCON<3>) register must be set. The Type C
timer holds the most significant word (msw) and the
Type B timer holds the least significant word (lsw)
for 32-bit operation.
DS70318D-page 186
Timer
Gated Timer
Synchronous Counter
Clear the T32 bit corresponding to that timer.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit.
16-Bit Operation
32-Bit Operation
Mode
TIMER MODE SETTINGS
TCS
0
0
1
TGATE
0
1
x
CY
Preliminary
).
When configured for 32-bit operation, only the Type B
Timer Control (TxCON) register bits are required for
setup and control while the Type C Timer Control
register bits are ignored (except the TSIDL bit).
For interrupt control, the combined 32-bit timer uses
the interrupt enable, interrupt flag and interrupt priority
control bits of the Type C timer. The interrupt control
and status bits for the Type B timer are ignored
during 32-bit timer operation.
The Timer2 and Timer 3 that can be combined to form a
32-bit timer are listed in Table 12-2.
TABLE 12-2:
A block diagram representation of the 32-bit timer
module is shown in Figure 12-3. The 32-timer module
can operate in one of the following modes:
• Timer mode
• Gated Timer mode
• Synchronous Counter mode
To configure the features of Timer2/3 for 32-bit
operation:
1.
2.
3.
4.
5.
6.
The timer value at any point is stored in the register
pair, TMR3:TMR2, which always contains the most
significant word of the count, while TMR2 contains the
least significant word.
Type B Timer (lsw)
Set the T32 control bit.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
Load the timer period value. PR3 contains the
most significant word of the value, while PR2
contains the least significant word.
If interrupts are required, set the interrupt enable
bit, T3IE. Use the priority bits, T3IP<2:0>, to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3
interrupt.
Set the corresponding TON bit.
Timer2
32-BIT TIMER
© 2009 Microchip Technology Inc.
Type C Timer (msw)
Timer3

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