PIC32MX420F032H-40I/MR Microchip Technology, PIC32MX420F032H-40I/MR Datasheet - Page 79

• Manufacturer Part Number: PIC32MX420F032H-40I/MR
• Description: IC PIC MCU FLASH 32KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX420F032H-40I/MR

• Core Size: 32-Bit
• Program Memory Size: 32KB (32K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 40MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• Ram Memory Size: 8KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-40:
TABLE 4-41:
Legend:
Note
Legend:
Note
2FFC DEVCFG0
0200
0210 RTCALRM
0220
0230
0240 ALRMTIME
0250 ALRMDATE
2FF0 DEVCFG3
2FF4 DEVCFG2
2FF8 DEVCFG1
1:
1:
RTCDATE
RTCCON
RTCTIME
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
These bits are only available on PIC32MX4XX devices.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0 USERID15 USERID14 USERID13 USERID12 USERID11 USERID10 USERID9
15:0 FUPLLEN
15:0
15:0
RTCC REGISTERS MAP
DEVCFG: DEVICE CONFIGURATION WORD SUMMARY
ALRMEN
PWP15
31/15
31/15
ON
—
—
—
—
—
—
—
FCKSM<1:0>
(1)
CHIME
PWP14
30/14
30/14
FRZ
—
—
—
—
—
—
—
—
YEAR10<3:0>
SEC10<3:0>
DAY10<3:0>
SEC10<3:0>
DAY10<3:0>
MIN10<3:0>
HR10<3:0>
PWP13
29/13
29/13
SIDL
PIV
—
—
—
—
—
—
—
—
FPBDIV<1:0>
ALRMSYNC
(1)
PWP12
28/12
28/12
CP
—
—
—
—
—
—
—
—
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
OSCIOFNC
26/10
26/10
YEAR01<3:0>
—
—
—
AMASK<3:0>
—
—
—
—
—
—
SEC01<3:0>
DAY01<3:0>
SEC01<3:0>
DAY01<3:0>
MIN01<3:0>
HR01<3:0>
FUPLLIDIV<2:0>
25/9
POSCMOD<1:0>
25/9
—
—
—
—
—
—
—
—
USERID8
(1)
24/8
24/8
BWP
—
—
—
—
—
—
—
Bits
Bits
RTSECSEL RTCCLKON
USERID7
FWDTEN
23/7
IESO
23/7
—
—
—
—
—
—
—
—
—
—
USERID6
MONTH10<3:0>
MONTH10<3:0>
22/6
22/6
—
—
—
—
—
MIN10<3:0>
MIN10<3:0>
—
—
—
—
—
—
FPLLMULT<2:0>
FSOSCEN
USERID5
21/5
21/5
—
—
—
—
—
—
—
—
—
—
—
CAL<11:0>
USERID4
20/4
20/4
—
—
—
—
—
—
—
—
—
—
—
ARPT<7:0>
RTCWREN RTCSYNC HALFSEC
USERID3
PWP19
ICESEL
19/3
19/3
—
—
—
—
—
—
—
WDTPS<4:0>
USERID2
PWP18
18/2
MONTH01<3:0>
MONTH01<3:0>
18/2
WDAY01<3:0>
WDAY01<3:0>
—
—
—
—
—
MIN01<3:0>
MIN01<3:0>
FPLLODIV<2:0>
FPLLIDIV<2:0>
FNOSC<2:0>
USERID1
PWP17
17/1
17/1
—
—
—
—
DEBUG<1:0>
USERID0 xxxx
RTCOE
PWP16
16/0
16/0
—
—
—
—
0000
0000
0000
0000
xxxx
xx00
xxxx
xx0x
xxxx
xx00
00xx
xx0x
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx