PIC32MX320F128H-80I/MR Microchip Technology, PIC32MX320F128H-80I/MR Datasheet - Page 57

• Manufacturer Part Number: PIC32MX320F128H-80I/MR
• Description: IC PIC MCU FLASH 128KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX320F128H-80I/MR

• Core Size: 32-Bit
• Program Memory Size: 128KB (128K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• No. Of I/o's: 53
• Ram Memory Size: 16KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-10:
Legend:
Note
5000
5010 I2C1STAT
5020
5030
5040
5050
5260
5200
5210 I2C2STAT
5220
5230
5240
5250
5260
1:
I2C1CON
I2C1MSK
I2C1BRG
I2C2CON
I2C2MSK
I2C2BRG
I2C1ADD
I2C1TRN
I2C1RCV
I2C2ADD
I2C2TRN
I2C2RCV
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table except I2CxRCV have corresponding CLR, SET and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV
Registers” for more information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
I2C1-2 REGISTERS MAP
ACKSTAT
ACKSTAT
31/15
ON
ON
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRSTAT
TRSTAT
30/14
FRZ
FRZ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
29/13
SIDL
SIDL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
SCLREL
SCLREL
28/12
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
STRICT
STRICT
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
A10M
A10M
BCL
BCL
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
GCSTAT
GCSTAT
DISSLW
DISSLW
25/9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ADD10
ADD10
SMEN
SMEN
24/8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bits
IWCOL
IWCOL
GCEN
GCEN
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
STREN
STREN
I2COV
I2COV
22/6
I2C1BRG<11:0>
I2C2BRG<11:0>
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ACKDT
ACKDT
21/5
D/A
D/A
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ADD<9:0>
MSK<9:0>
ADD<9:0>
MSK<9:0>
ACKEN
ACKEN
I2CR1DATA<7:0>
I2CR2DATA<7:0>
I2CT1DATA<7:0>
I2CT2DATA<7:0>
20/4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P
P
RCEN
RCEN
19/3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
S
S
18/2
PEN
PEN
R/W
R/W
—
—
—
—
—
—
—
—
—
—
—
—
—
—
RSEN
RSEN
17/1
RBF
RBF
—
—
—
—
—
—
—
—
—
—
—
—
—
—
16/0
SEN
TBF
SEN
TBF
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000