ATMEGA169P-16AU Atmel, ATMEGA169P-16AU Datasheet
ATMEGA169P-16AU
Specifications of ATMEGA169P-16AU
Available stocks
Related parts for ATMEGA169P-16AU
ATMEGA169P-16AU Summary of contents
Page 1
... I/O and Packages – 54 Programmable I/O Lines – 64-lead TQFP, 64-pad QFN/MLF and 64-pad DRQFN • Speed Grade: – ATmega169PV MHz @ 1.8V - 5.5V MHz @ 2.7V - 5.5V – ATmega169P MHz @ 2.7V - 5.5V MHz @ 4.5V - 5.5V • Temperature range: – -40°C to 85°C Industrial • ...
Page 2
... Pin Configurations 1.1 Pinout - TQFP/QFN/MLF Figure 1-1. 64A (TQFP)and 64M1 (QFN/MLF) Pinout ATmega169P LCDCAP 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) PB3 13 (OC0A/PCINT12) PB4 14 (OC1A/PCINT13) PB5 ...
Page 3
... Pinout - DRQFN Figure 1-2. 64MC (DRQFN) Pinout ATmega169P Top view Table 1-1. DRQFN-64 Pinout ATmega169P. A1 PE0 A9 B1 VLCDCAP B8 A2 PE1 A10 B2 PE2 B9 A3 PE3 A11 B3 PE4 B10 A4 PE5 A12 B4 PE6 B11 A5 PE7 A13 B5 PB0 B12 A6 PB1 A14 B6 PB2 B13 A7 PB3 ...
Page 4
... Overview The ATmega169P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut- ing powerful instructions in a single clock cycle, the ATmega169P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...
Page 5
... Atmel ATmega169P is a powerful microcontroller that provides a highly flex- ible and cost effective solution to many embedded control applications. The ATmega169P AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. 8018PS– ...
Page 6
... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega169P as listed on ”Alternate Functions of Port A” on page 2.2.4 Port B (PB7:PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) ...
Page 7
... As inputs, Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port E also serves the functions of various special features of the ATmega169P as listed on ”Alternate Functions of Port E” on page 2.2.8 Port F (PF7:PF0) Port F serves as the analog inputs to the A/D Converter ...
Page 8
... An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as shown in ure 23-2 on page capacitance reduces ripple on V 8018PS–AVR–08/10 236. This capacitor acts as a reservoir for LCD power (V but increases the time until V LCD ATmega169P Fig large LCD reaches its target value. LCD 8 ...
Page 9
... A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. 8018PS–AVR–08/10 1. ATmega169P 9 ...
Page 10
... USART0 I/O Data Register USART0 Baud Rate Register Low – – – UMSEL0 UPM01 UPM00 TXCIE0 UDRIE0 RXEN0 TXC0 UDRE0 FE0 ATmega169P Bit 3 Bit 2 Bit 1 – – – – – – SEG324 SEG318 SEG317 SEG316 SEG310 SEG309 SEG308 ...
Page 11
... Timer/Counter1 - Counter Register Low Byte – – – FOC1B – – ICES1 – WGM13 COM1A0 COM1B1 COM1B0 – – – ADC6D ADC5D ADC4D ATmega169P Bit 3 Bit 2 Bit 1 – – – – – – – – – – – – – – – ...
Page 12
... EEPROM Address Register Low Byte EEPROM Data Register – – – General Purpose I/O Register 0 PCIE0 – – PCIF0 – – ATmega169P Bit 3 Bit 2 Bit 1 – – – MUX3 MUX2 MUX1 – ADTS2 ADTS1 ADIE ADPS2 ADPS1 – ...
Page 13
... When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega169P is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...
Page 14
... PC ← then PC ← then PC ← then PC ← then PC ← then PC ← ⊕ then PC ← ⊕ then PC ← then PC ← then PC ← then PC ← then PC ← then PC ← ATmega169P Operation Flags #Clocks Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V ...
Page 15
... Rr, Y ← ← (Y) ← ← Rr (Z) ← Rr (Z) ← Rr, Z ← ← (Z) ← ← Rr (k) ← ← (Z) Rd ← (Z) Rd ← (Z), Z ← Z+1 (Z) ← R1:R0 Rd ← ← Rr ATmega169P Operation Flags #Clocks None None None None None Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V ...
Page 16
... No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8018PS–AVR–08/10 Description STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ATmega169P Operation Flags #Clocks None None None None None None ...
Page 17
... Staggered), 7 × 7 × 1.0 mm body, 4.0 × 4.0 mm Exposed Pad, Quad Flat No-Lead Package (QFN) 8018PS–AVR–08/10 Ordering Code Package ATmega169PV-8AU 64A ATmega169PV-8MU 64M1 ATmega169PV-8MCH 64MC ATmega169P-16AU 64A ATmega169P-16MU 64M1 ATmega169P-16MCH 64MC and Figure 28-2 on page 332. Package Type ...
Page 18
... Orchard Parkway San Jose, CA 95131 R 8018PS–AVR–08/10 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169P A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM SYMBOL A – – A1 0.05 – ...
Page 19
... Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega169P C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A ...
Page 20
... A34 B30 A1 B1 0.40 b R0. (0.18) REF B8 A9 (0.1) REF K TITLE 64MC, 64QFN (2-Row Staggered 1.00 mm Body, 4.0 x 4.0 mm Exposed Pad, Quad Flat No Lead Package ATmega169P C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM MAX A 0.80 0.90 1.00 A1 0.00 0.02 ...
Page 21
... Errata 9.1 ATmega169P Rev known errata. 9.2 ATmega169P Rev Not sampled. 8018PS–AVR–08/10 ATmega169P 21 ...
Page 22
... DRQFN” on page • The Staggered QFN is named Dual Row QFN (DRQFN). Updated package information in ”Features” on page Removed “Disclaimer” from section Added ”64MC (DRQFN) Pinout ATmega169P” on page 3 Added ”Data Retention” on page 9. Updated ”Stack Pointer” on page Updated ” ...
Page 23
... Updated ”Low-frequency Crystal Oscillator” on page Updated ”Device Identification Register” on page Updated ”Signature Bytes” on page Added Table 27-6 on page 299. ATmega169P by a correct one. 17. ”Packaging Information” on page in the LCD section. 333. 34. 35, Table 8-10 on page 336. ”Electrical Characteristics” on page 32 ...
Page 24
... Internal RC Oscillator” on page Updated ”OSCCAL – Oscillator Calibration Register” on page Added Table 28-2 on page 332. Updated ”Calibrated Internal RC Oscillator” on page Initial revision. ATmega169P 88. 97. 120. Table 14-4 on page 103, Table 15-3 on page and Table 17-4 on page 199. ...
Page 25
... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...