ATMEGA644V-10AU Atmel, ATMEGA644V-10AU Datasheet - Page 5

• Manufacturer Part Number: ATMEGA644V-10AU
• Description: IC AVR MCU FLASH 64K 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA644V-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 44TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 10 MHz
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2593NS–AVR–07/10
Port B (PB7:PB0)
Port C (PC7:PC0)
Port D (PD7:PD0)
RESET
XTAL1
XTAL2
and source capability. As inputs, Port A pins that are externally pulled low will source current if
the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega644 as listed on
73.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega644 as listed on
75.
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of the JTAG interface, along with special features of the
ATmega644 as listed on
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATmega644 as listed on
80.
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
Characteristics” on page
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
page
320. Shorter pulses are not guaranteed to generate a reset.
78.
ATmega644
”System and Reset
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