ATMEGA32-16PU Atmel, ATMEGA32-16PU Datasheet - Page 157

IC AVR MCU 32K 16MHZ 5V 40DIP

ATMEGA32-16PU

Manufacturer Part Number
ATMEGA32-16PU
Description
IC AVR MCU 32K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
2-Wire/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Data Rom Size
1024 B
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1024Byte
Ram Memory Size
2KB
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32-16PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Read Access
USART Register
Description
USART I/O Data Register –
UDR
2503G–AVR–11/04
Doing a read access to the UBRRH or the UCSRC Register is a more complex opera-
tion. However, in most applications, it is rarely necessary to read any of these registers.
The read access is controlled by a timed sequence. Reading the I/O location once
returns the UBRRH Register contents. If the register location was read in previous sys-
tem clock cycle, reading the register in the current clock cycle will return the UCSRC
contents. Note that the timed sequence for reading the UCSRC is an atomic operation.
Interrupts must therefore be controlled (for example by disabling interrupts globally) dur-
ing the read operation.
The following code example shows how to read the UCSRC Register contents.
Note:
The assembly code example returns the UCSRC value in r16.
Reading the UBRRH contents is not an atomic operation and therefore it can be read as
an ordinary register, as long as the previous instruction did not access the register
location.
The USART Transmit Data Buffer Register and USART Receive Data Buffer Registers
share the same I/O address referred to as USART Data Register or UDR. The Transmit
Data Buffer Register (TXB) will be the destination for data written to the UDR Register
location. Reading the UDR Register location will return the contents of the Receive Data
Buffer Register (RXB).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter
and set to zero by the Receiver.
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
USART_ReadUCSRC:
unsigned char USART_ReadUCSRC( void )
{
}
; Read UCSRC
in
in
ret
unsigned char ucsrc;
/* Read UCSRC */
ucsrc = UBRRH;
ucsrc = UCSRC;
return ucsrc;
1. See “About Code Examples” on page 5.
r16,UBRRH
r16,UCSRC
R/W
7
0
(1)
R/W
6
0
(1)
R/W
5
0
R/W
4
0
RXB[7:0]
TXB[7:0]
R/W
3
0
R/W
2
0
ATmega32(L)
R/W
1
0
R/W
0
0
UDR (Read)
UDR (Write)
157

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