PIC16C65A-04I/L Microchip Technology, PIC16C65A-04I/L Datasheet - Page 2

• Manufacturer Part Number: PIC16C65A-04I/L
• Description: IC MCU OTP 4KX14 PWM 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C65A-04I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

PIC16C65
Clarifications/Corrections to the Data Sheet:
In the Device Data Sheet (DS30234 D ), the following clar-
ifications and corrections should be noted.
TABLE 1:
2.
a)
TABLE 2:
3.
a)
DS30234D/C65/E2A1-page 2
* This parameter is characterized but not tested
Parm
71A
72A
73A
Param
D150
No.
71
72
No.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Module: SSP (SPI Mode Timing Specificatios)
The SPI interface timings have been modified to
the values shown in Table 2.
Module: Timer1
The operation of Timer1 needs some clarification
when the timer registers are written when the
TMR1ON bit is set.
The internal clock signal that is the input to the TMR1
presaler
(TMR1H:TMR1L registers and the Timer1 pres-
caler). When the Timer1 registers are NOT written,
the Timer1 will increment on the rising edge of the
TMR1 increment clock.
T
T
Sym.
T
SC
SC
B
Sym.
V
2
H
OD
L
B
affects
DC SPECIFICATION CHANGES FROM DATA SHEET
DC SPECIFICATION CHANGES FROM DATA SHEET
Characteristic
SCK input high
time
(slave mode)
SCK input low
time
(slave mode)
Last clock edge of the Byte1 to 1st
clock edge of the Byte2
Characteristic
Open-drain High Voltage
the
incrementing
Continuous
Single Byte
Continuous
Single Byte
(1)
of Timer1
(1)
(1)
1.25 T
1.25 T
+ 30 ns
+ 30 ns
1.5 T
+ 40 ns
Min
Min
40
40
Ñ
New Specification
New Specification
1.
CY
CY
CY
Module: I/O Ports
The specification for the High Voltage Open Drain
I/O (The RA4 pin on most devices) cannot be met
without possible long term reliability issues on that
I/O pin. If a high voltage drive is required, use an
external transistor that can support the required
voltage.
When the TMR1H and/or TMR1L registers are writ-
ten while this clock is high, TMR1 will increment on
the next rising edge of this clock.
When the TMR1H and/or TMR1L registers are writ-
ten while this clock is low, TMR1 will not increment on
the next rising edge of this clock, but must first have
a falling clock and the the rising clock for TMR1 to
increment.
Figure 1 shows the two cases of writes to the TMR1H
and/or TMR1L registers. Due to the V
thresholds on the oscillator/clock pins, external
Typ
Typ
Ñ
—
—
—
—
—
Max
Max
10
—
—
—
—
—
T
T
20 ns
20 ns
Min
Min
CY
CY
Ñ
1998 Microchip Technology Inc.
+
+
Specification
Specification
Data Sheet
Data Sheet
N.A.
N.A.
N.A.
Typ
Typ
Ñ
—
—
Max
Max
14
—
—
IH
and V
Units
Units
ns
ns
ns
ns
ns
V
IL