STM32F103VBH6 STMicroelectronics, STM32F103VBH6 Datasheet

MCU ARM 128KB FLASH MEM 100-LFBG

STM32F103VBH6

Manufacturer Part Number
STM32F103VBH6
Description
MCU ARM 128KB FLASH MEM 100-LFBG
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103VBH6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFBGA
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
20 KB
Interface Type
CAN, I2C, SPI, USART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
100
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit x 2, 16 Channel
For Use With
497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-9091 - LED BOARD FOR STM32 STP16DP05497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8511 - KIT STARTER FOR STM32 512K FLASH497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2MCBSTM32 - BOARD EVAL FOR STM STM32X SER497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6069

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Features
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July 2007
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
Performance line, ARM-based 32-bit MCU with Flash, USB, CAN,
seven 16-bit timers, two ADCs and nine communication interfaces
Core: ARM 32-bit Cortex™-M3 CPU
– 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz
– Single-cycle multiplication and hardware
– Nested interrupt controller with 43
– Interrupt processing (down to 6 CPU
Memories
– 32-to-128 Kbytes of Flash memory
– 6-to-20 Kbytes of SRAM
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage
– 4-to-16 MHz quartz oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 32 kHz RC
– PLL for CPU clock
– Dedicated 32 kHz oscillator for RTC with
Low power
– Sleep, Stop and Standby modes
– V
2 x 12-bit, 1 µs A/D converters (16-channel)
– Conversion range: 0 to 3.6 V
– Dual-sample and hold capability
– Synchronizable with advanced control timer
– Temperature sensor
DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
division
maskable interrupt channels
cycles) with tail chaining
detector (PVD)
calibration
I
2
BAT
Cs and USARTs
supply for RTC and backup registers
STM32F103x8 STM32F103xB
Rev 2
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Table 1.
STM32F103x6 STM32F103C6, STM32F103R6
STM32F103x8
STM32F103xB STM32F103RB STM32F103VB
7 x 7 mm
LQFP48
Reference
Debug mode
– Serial wire debug (SWD) & JTAG interfaces
Up to 80 fast I/O ports
– 32/49/80 5 V-tolerant I/Os
– All mappable on 16 external interrupt
– Atomic read/modify/write operations
Up to 7 timers
– Up to three 16-bit timers, each with up to 4
– 16-bit, 6-channel advanced control timer:
– 2 x 16-bit watchdog timers (Independent
– SysTick timer: a 24-bit downcounter
Up to 9 communication interfaces
– Up to 2 x I
– Up to 3 USARTs (ISO 7816 interface, LIN,
– Up to 2 SPIs (18 Mbit/s)
– CAN interface (2.0B Active)
– USB 2.0 full speed interface
vectors
IC/OC/PWM or pulse counter
and Window)
IrDA capability, modem control)
up to 6 channels for PWM output
Dead time generation and emergency
stop
Device summary
14 x 14 mm
LQFP100
STM32F103C8, STM32F103R8
STM32F103V8
2
C interfaces (SMBus/PMBus)
STM32F103x6
Root part number
10 x 10 mm
LQFP64
Preliminary Data
10 x 10 mm
BGA100
www.st.com
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1

Related parts for STM32F103VBH6

STM32F103VBH6 Summary of contents

Page 1

Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces Features Core: ARM 32-bit Cortex™-M3 CPU I – 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz – Single-cycle multiplication and hardware division – ...

Page 2

Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

STM32F103xx 5.3.14 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

STM32F103xx List of figures Figure 1. STM32F103xx performance line block diagram Figure 2. STM32F103xx performance line LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . ...

Page 6

Introduction 1 Introduction This datasheet provides the STM32F103xx performance line ordering information and mechanical device characteristics. For information on programming, erasing and protection of the internal Flash memory please refer to the STM32F10xxx Flash programming reference manual, pm0042, available from ...

Page 7

STM32F103xx 2.1 Device overview Table 2. Device features and peripheral counts (STM32F103xx performance line) Peripheral Flash - Kbytes SRAM - Kbytes General purpose Advanced Control SPI USART USB CAN GPIOs 12-bit synchronized ADC Number of channels CPU ...

Page 8

Description 2.2 Overview ® TM ARM Cortex -M3 core with embedded Flash and SRAM The ARM Cortex-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the ...

Page 9

STM32F103xx Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-16 MHz clock can be selected and is monitored for failure. During ...

Page 10

Description Voltage regulator The regulator has three operation modes: main (MR), low power (LPR) and power down used in the nominal regulation mode (Run) G LPR is used in the Stop modes. G Power down is used in ...

Page 11

STM32F103xx RTC (real-time clock) and backup registers The RTC and the backup registers are supplied through a switch that takes power either on V supply when present or through the V DD registers) can be used to store data when ...

Page 12

Description Advanced control timer (TIM1) The advanced control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 channels. It can also be seen as a complete general-purpose timer. The 4 independent channels can be used for Input ...

Page 13

STM32F103xx Universal serial bus (USB) The STM32F103xx performance line embeds a USB device peripheral compatible with the USB Full-speed 12 Mbs. The USB interface implements a full speed (12 Mbit/s) function interface. It has software configurable endpoint setting and suspend/resume ...

Page 14

Description Figure 1. STM32F103xx performance line block diagram –40 °C to +105 °C (junction temperature up to 125 ° alternate function on I/O port pin. 14/67 STM32F103xx ai14390 ...

Page 15

STM32F103xx 3 Pin descriptions Figure 2. STM32F103xx performance line LQFP100 pinout PE2 PE3 PE4 PE5 PE6 VBAT PC13-ANTI_TAMP PC14-OSC32_IN PC15-OSC32_OUT VSS_5 VDD_5 OSC_IN OSC_OUT NRST PC0 PC1 PC2 PC3 VSSA VREF- VREF+ VDDA PA0-WKUP PA1 PA2 ...

Page 16

Pin descriptions Figure 3. STM32F103xx performance line LQFP64 pinout PC13-ANTI_TAMP PC14-OSC32_IN PC15-OSC32_OUT PD0 OSC_IN PD1 OSC_OUT Figure 4. STM32F103xx performance line LQFP48 pinout PC15-OSC32_OUT 16/67 VBAT NRST PC0 LQFP64 PC1 PC2 PC3 VSSA VDDA PA0-WKUP PA1 PA2 ...

Page 17

STM32F103xx Figure 5. STM32F103xx performance line BGA100 ballout PC14- PC13- A PE2 OSC32_IN ANTI_TAMP PC15 BAT PE3 OSC32_OUT C OSC_IN V SS_5 PE4 D OSC_OUT V DD_5 PE5 E NRST PE6 PCD F PC0 PC1 ...

Page 18

Pin descriptions Table 3. Pin definitions Pins Pin name PE2/TRACECK PE3/TRACED0 PE4/TRACED1 PE5/TRACED2 PE6/TRACED3 BAT ...

Page 19

STM32F103xx Table 3. Pin definitions (continued) Pins Pin name PA4/SPI1_NSS USART2_CK/ADC_IN4 PA5/SPI1_SCK/ ADC_IN5 PA6/SPI1_MISO ADC_IN6/TIM3_CH1 PA7/SPI1_MOSI ADC_IN7/TIM3_CH2 PC4/ADC_IN14 H4 - ...

Page 20

Pin descriptions Table 3. Pin definitions (continued) Pins Pin name PB15/SPI2_MOSI TIM1_CH3N PD8 PD9 PD10 PD11 K10 - - 59 ...

Page 21

... This alternate function can be remapped by software to some other port pins (if available on the used package). For more details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual, UM0306, available from the STMicroelectronics website: www.st.com. 7. For the LQFP48 and LQFP64 packages, the pins number 5 and 6 are configured as OSC_IN/OSC_OUT after reset, however the functionality of PD0 and PD1 can be remapped by software on these pins ...

Page 22

Memory mapping 4 Memory mapping The memory map is shown in Figure 6. Memory map 0xFFFF FFFF 0xFFFF F000 7 0xE010 0000 Cortex-M3 Internal Peripherals 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x6000 0000 2 ...

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STM32F103xx 5 Electrical characteristics 5.1 Test conditions Unless otherwise specified, all voltages are referred to V 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage ...

Page 24

Electrical characteristics Figure 7. Pin loading conditions 5.1.6 Power supply scheme Figure 9. Power supply scheme 1.8-3 × 100 × 10 µ µF ...

Page 25

STM32F103xx 5.1.7 Current consumption measurement Figure 10. Current consumption measurement scheme Electrical characteristics BAT V BAT DDA ai14126 25/67 ...

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Electrical characteristics 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 5: Current characteristics, and damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. ...

Page 27

STM32F103xx Table 6. Thermal characteristics Symbol T STG T J 5.3 Operating conditions 5.3.1 General operating conditions Table 7. General operating conditions Symbol f Internal AHB clock frequency HCLK f Internal APB1 clock frequency PCLK1 f Internal APB2 clock frequency ...

Page 28

Electrical characteristics 5.3.3 Embedded reset and power control block characteristics The parameters given in temperature and V DD Table 9. Embedded reset and power control block characteristics Symbol Programmable voltage V PVD detector level selection V PVD hysteresis PVDhyst Power ...

Page 29

STM32F103xx 5.3.5 Supply current characteristics The current consumption is measured as described in measurement scheme. Maximum current consumption The MCU is placed under the following conditions: All I/O pins are in input mode with a static value ...

Page 30

Electrical characteristics Table 12. Maximum current consumption in Stop and Standby modes Symbol Parameter Regulator in Run mode, Low-speed and high-speed internal RC oscillators and high-speed oscillator OFF (no independent watchdog) Supply current in Stop mode Regulator in Low Power ...

Page 31

STM32F103xx Typical current consumption The MCU is placed under the following conditions: All I/O pins are in input mode with a static value All peripherals are disabled except explicitly mentioned. G The access time ...

Page 32

Electrical characteristics Table 14. Typical current consumption in Stop and Standby modes Symbol Parameter Supply current in Stop mode I DD Supply current in Standby mode Backup domain I DD_VBAT supply current 1. TBD stands for to be determined. 2. ...

Page 33

STM32F103xx 5.3.6 External clock source characteristics High-speed external user clock The characteristics given in external clock source, and under ambient temperature and supply voltage conditions summarized in Table Table 15. High-speed external (HSE) user clock characteristics Symbol Parameter User external ...

Page 34

Electrical characteristics Figure 11. High-speed external clock source AC timing diagram V HSEH 90% 10% V HSEL t r(HSE) EXTER NAL CLOCK SOURC E Figure 12. Low-speed external clock source AC timing diagram V LSEH 90% 10% V LSEL t ...

Page 35

STM32F103xx High-speed external clock The high-speed external (HSE) clock can be supplied with MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in ...

Page 36

Electrical characteristics Low-speed external clock The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in the ...

Page 37

STM32F103xx 5.3.7 Internal clock source characteristics The parameters given in temperature and V DD High-speed internal (HSI) RC oscillator Table 19. HSI oscillator characteristics Symbol Parameter f Frequency HSI ACC Accuracy of HSI oscillator HSI t HSI oscillator start up ...

Page 38

Electrical characteristics Wakeup time from low power mode The wakeup times given in oscillator. The clock source used to wake up the device depends from the current operating mode: Stop or Standby mode: the clock source is the RC oscillator ...

Page 39

STM32F103xx 5.3.9 Memory characteristics Flash memory The characteristics are given at T Table 23. Flash memory characteristics Symbol t Word programming time prog t Page (1kB) erase time ERASE t Mass erase time ME I Supply current DD 1. Values ...

Page 40

Electrical characteristics 5.3.10 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by ...

Page 41

STM32F103xx Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second. To complete these trials, ESD stress ...

Page 42

Electrical characteristics 5.3.11 Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a ...

Page 43

STM32F103xx 5.3.12 I/O port pin characteristics General input/output characteristics Unless otherwise specified, the parameters given in performed under ambient temperature and V Table 7. All unused pins must be held at a fixed voltage, by using the I/O output mode, ...

Page 44

Electrical characteristics Figure 15. Unused I/O pin connection Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink +20 mA (with a relaxed V In the user application, the number of I/O ...

Page 45

STM32F103xx Output voltage levels Unless otherwise specified, the parameters given in performed under ambient temperature and V Table 7. Table 30. Output voltage characteristics Symbol Output low level voltage for an I/O pin ( when 8 pins are ...

Page 46

Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Table 31, respectively. Unless otherwise specified, the parameters given in performed under ambient temperature and V Table 7. Table 31. I/O AC characteristics I/O ...

Page 47

STM32F103xx Figure 16. I/O AC characteristics definition EXT ERNAL OUTPUT ON 50pF Maximum frequency is achieved £ 2/3)T and if the duty cycle is (45-55%) 5.3.13 NRST pin characteristics The NRST pin input ...

Page 48

Electrical characteristics Figure 17. Recommended NRST pin protection External reset circuit 2. The reset network protects the device against parasitic resets. 3. The user must ensure that the level on the NRST pin can go below the V Table 32. ...

Page 49

STM32F103xx 5.3.15 Communications interfaces interface characteristics Unless otherwise specified, the parameters given in performed under ambient temperature, f summarized in Table The STM32F103xx performance line communication protocol with the following restrictions: the I/O ...

Page 50

Electrical characteristics 2 Figure 18 bus AC waveforms and measurement circuit bus S TART SDA t f(SDA) t h(STA) SCL t w(SCKH) 1. Measurement points are done at CMOS levels: 0.3V Table 35. SCL frequency ...

Page 51

STM32F103xx SPI interface characteristics Unless otherwise specified, the parameters given in performed under ambient temperature, f summarized in Table Refer to Section 5.3.12: I/O port pin characteristics alternate function characteristics (NSS, SCK, MOSI, MISO). Table 36. SPI characteristics Symbol Parameter ...

Page 52

Electrical characteristics Figure 19. SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT 1. ...

Page 53

STM32F103xx Figure 21. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V USB characteristics ...

Page 54

Electrical characteristics Figure 22. USB timings: definition of data signal rise and fall time Differen tial Data L ines V CRS Table 38. USB: Full speed electrical characteristics Symbol Driver characteristics Rise/ ...

Page 55

STM32F103xx Table 39. ADC characteristics Symbol Parameter R External input impedance AIN External capacitor on analog C AIN input Negative input leakage current I lkg on analog pins R Sampling switch resistance ADC Internal sample and hold C ADC capacitor ...

Page 56

Electrical characteristics Figure 23. ADC accuracy characteristics 1023 1022 1LSB = IDEAL 1021 SSA Figure 24. Typical connection diagram using the ADC R AIN V AIN ...

Page 57

STM32F103xx General PCB design guidelines Power supply decoupling should be performed as shown in depending on whether V ceramic (good quality). They should be placed them as close as possible to the chip. Figure 25. Power supply and reference decoupling ...

Page 58

Electrical characteristics 5.3.18 Temperature sensor characteristics Table 41. TS characteristics Symbol SENSE Avg_Slope Average slope V Voltage at 25 ° Startup time START 58/67 Parameter Conditions linearity with temperature STM32F103xx Min Typ Max Unit ± ...

Page 59

STM32F103xx 6 Package characteristics Figure 27. LFBGA100 - low profile fine pitch ball grid array package outline Table 42. LFBGA100 - low profile fine pitch ball grid array package mechanical data Dim ...

Page 60

Package characteristics Figure 28. Recommended PCB design rules (0.80/0.75 mm pitch BGA) Dpad Dsm 60/67 Dpad 0.37 mm 0.52 mm typ. (depends on solder Dsm mask registration tolerance Solder paste 0.37 mm aperture diameter – Non solder mask defined pads ...

Page 61

STM32F103xx Figure 29. LQFP100 – 100-pin low-profile quad flat package outline Table 43. LQFP100 – 100-pin low-profile quad flat package mechanical data Dim. Min A A1 0.05 A2 1.35 b 0. θ 0° ...

Page 62

Package characteristics Figure 30. LQFP64 – 64 pin low-profile quad flat package outline Table 44. LQFP64 – 64 pin low-profile quad flat package mechanical data Dim. Min A A1 0.05 A2 1.35 b 0. ...

Page 63

STM32F103xx Figure 31. LQFP48 – 48 pin low-profile quad flat package outline Table 45. LQFP48 – 48 pin low-profile quad flat package mechanical data Dim. Min A A1 0.05 A2 1.35 b 0. ...

Page 64

Package characteristics 6.1 Thermal characteristics The average chip-junction temperature, T following equation: Where the Ambient Temperature in ° Θ is the Package Junction-to-Ambient Thermal Resistance, in ° C/ the sum of ...

Page 65

... STM32F103R8T6 STM32F103RBT6 STM32F103V8T6 STM32F103VBT6 STM32F103V8H6 STM32F103VBH6 7.1 Future family enhancements Further developments of the STM32F103xx performance line will see an expansion of the current options. Larger packages will soon be available with up to 512KB Flash, 64KB SRAM and with extended features such as EMI support, SDIO, I2S, DAC and additional timers and USARTS ...

Page 66

Revision history 8 Revision history Table 48. Document revision history Date Revision 01-jun-2007 1 20-Jul-2007 2 66/67 Changes Initial release. Flash memory size modified in Note BGA100 pins added to Table 3: Pin definitions. performance line BGA100 ballout added. T ...

Page 67

... STM32F103xx Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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