C8051F563-IQ Silicon Laboratories Inc, C8051F563-IQ Datasheet - Page 22

• Manufacturer Part Number: C8051F563-IQ
• Description: IC 8051 MCU 32K FLASH 32-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F56xr

Specifications of C8051F563-IQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-QFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 25x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Operating Supply Voltage: 1.8 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F560DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1700

C8051F55x/56x/57x
3. Pin Definitions
22
VREGIN
GNDA
Name
VDDA
C2CK
P4.0/
P3.0/
P2.1/
GND
RST/
VDD
C2D
C2D
C2D
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
VIO
packages
40-pin
Pin
10
40
39
38
37
36
35
4
6
5
7
3
2
9
8
1
Table 3.1. Pin Definitions for the C8051F55x/56x/57x
packages
32-pin
Pin
10
32
31
30
29
28
27
—
—
4
6
5
7
3
2
9
8
1
packages
24-pin
Pin
24
23
22
21
20
19
18
—
—
—
3
4
5
2
1
8
7
6
D I/O or A In
D I/O or A In
D I/O or A In
D I/O or A In Port 0.0. See SFR Definition 19.12.
D I/O or A In Port 0.1
D I/O or A In Port 0.2
D I/O or A In Port 0.3
D I/O or A In Port 0.4
D I/O or A In Port 0.5
D I/O or A In Port 0.6
D I/O or A In Port 0.7
Rev. 1.1
D I/O
D I/O
D I/O
D I/O
D I/O
Type
Digital Supply Voltage. Must be connected.
Digital Ground. Must be connected.
Analog Supply Voltage. Must be connected.
Analog Ground. Must be connected.
Voltage Regulator Input
Port I/O Supply Voltage. Must be connected.
Device Reset. Open-drain output of internal
POR or V
Clock signal for the C2 Debug Interface.
Port 4.0. See SFR Definition 19.28.
Bi-directional data signal for the C2 Debug
Interface.
Port 3.0. See SFR Definition 19.24.
Bi-directional data signal for the C2 Debug
Interface.
Port 2.1. See SFR Definition 19.20.
Bi-directional data signal for the C2 Debug
Interface.
DD
Monitor.
Description