C8051F34A-GQ Silicon Laboratories Inc, C8051F34A-GQ Datasheet - Page 274

• Manufacturer Part Number: C8051F34A-GQ
• Description: IC 8051 MCU 64K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F34A-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1533

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
D
Revision 0.5 to Revision 1.0
•
•
•
•
•
Revision 1.0 to Revision 1.1
•
•
•
•
•
•
•
•
•
•
•
•
Revision 1.1 to Revision 1.2
•
•
•
Revision 1.2 to Revision 1.3
•
Revision 1.3 to Revision 1.4
•
274
OCUMENT
- Slave Transmitter (Status Vector: 0101)
- Slave Receiver (Status Vector: 0001)
Updated Table 3.1, “Global DC Electrical Characteristics,” on page 25.
Updated Table 5.1, “ADC0 Electrical Characteristics,” on page 56.
Various small text changes.
Updated Table 8.1, “Voltage Regulator Electrical Specifications,” on page 69.
Updated Flash security behavior.
Added two new part numbers C8051F348/9 and made associated changes.
Corrected the entries "24 kHz" and "48 kHz" to "24 MHz" and "48 MHz" in the "Conditions" column of
Table 3.1, "Global DC Electrical Characteristics," on page 38.
Added note to configure external interrupt pin as open-drain with a “1” in the port latch in Section 9.3.2.
"External Interrupts" on page 96.
Various small text changes.
Updated the figures in Section 15.1. "Priority Crossbar Decoder" and added a new figure to clarify
crossbar capabilities.
Corrected the description of the UNDRUN bit in USB Register Definition 16.19. "EINCSRL: USB0 IN
Endpoint Control Low Byte" on page 198 to clarify that this bit works only in Isochronous Mode.
Corrected the maximum SMBus speed from 1/10th to 1/20th of the system clock in Section 17.
"SMBus" on page 205.
Corrected the descriptions for the following states and the corresponding typical response options in
Table 17.4. "SMBus Status Decoding" on page 221:
Corrected the bit location of MSTEN from SPI0CN.6 to SPI0CFG.6 in Section 20.2. "SPI0 Master
Operation" on page 243.
Corrected the description of the WCOL bit in SFR Definition 20.2. "SPI0CN: SPI0 Control" on page
249 to match the description in Section 20.4. "SPI0 Interrupt Sources" on page 245.
Clarified the following parameters in Table 8.1, “Voltage Regulator Electrical Specifications,” on
page 69:
- VBUS Detection Input High and Low Voltages
- Dropout Voltage
Updated the package drawings with additional dimensions in Figure 4.2 and Table 4.2, “TQFP-48
Added two new part numbers C8051F34A/B and made associated changes.
Corrected references to locations of T0M and T1M in the SFR definition of TMOD on page 240.
Corrected instances of "8k" to "4k" in the SFR definition of EMI0CF on page 118.
Added QFN-32 package.
Added C8051F34C and C8051F34D devices.
Package Dimensions,” on page 32, and Figure 4.4 and Table 4.4, “LQFP-32 Package Dimensions,”
on page 35.
C
HANGE
L
IST
Rev. 1.3