PIC16F627-20/SS Microchip Technology, PIC16F627-20/SS Datasheet - Page 63

IC MCU FLASH 1KX14 COMP 20SSOP

PIC16F627-20/SS

Manufacturer Part Number
PIC16F627-20/SS
Description
IC MCU FLASH 1KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16F627-20/SS

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
11.0
The CCP (Capture/Compare/PWM) module contains a
16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register or as a PWM
master/slave Duty Cycle register. Table 11-1 shows the
timer resources of the CCP Module modes.
CCP1 Module
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
Additional information on the CCP module is available
in the PICmicro™ Mid-Range Reference Manual,
(DS33023).
REGISTER 11-1:
 2003 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER (ADDRESS: 17h)
bit 7
Unimplemented: Read as '0'
CCP1X:CCP1Y: PWM Least Significant bits
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in
CCPRxL.
CCP1M3:CCP1M0: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1
11xx = PWM mode
Legend:
R = Readable bit
-n = Value at POR
U-0
unaffected)
U-0
CCP1X
R/W-0
Preliminary
W = Writable bit
’1’ = Bit is set
CCP1Y
R/W-0
TABLE 11-1:
CCP Mode
CCP1M3
Compare
Capture
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
PWM
CCP MODE - TIMER
RESOURCE
CCP1M2 CCP1M1 CCP1M0
R/W-0
PIC16F62X
x = Bit is unknown
Timer Resource
R/W-0
DS40300C-page 61
Timer1
Timer1
Timer2
R/W-0
bit 0

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