C8051F343-GM Silicon Laboratories Inc, C8051F343-GM Datasheet - Page 250

• Manufacturer Part Number: C8051F343-GM
• Description: IC 8051 MCU 32K FLASH MEM 32-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F343-GM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1346-5

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
21.3.2. 8-bit Timers with Auto-Reload
When T3SPLIT is ‘1’ and T3CE = ‘0’, Timer 3 operates as two 8-bit timers (TMR3H and TMR3L). Both 8-bit
timers operate in auto-reload mode as shown in Figure 21.5. TMR3RLL holds the reload value for TMR3L;
TMR3RLH holds the reload value for TMR3H. The TR3 bit in TMR3CN handles the run control for TMR3H.
TMR3L is always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock
source divided by 8. The Timer 3 Clock Select bits (T3MH and T3ML in CKCON) select either SYSCLK or
the clock defined by the Timer 3 External Clock Select bit (T3XCLK in TMR3CN), as follows:
The TF3H bit is set when TMR3H overflows from 0xFF to 0x00; the TF3L bit is set when TMR3L overflows
from 0xFF to 0x00. When Timer 3 interrupts are enabled, an interrupt is generated each time TMR3H over-
flows. If Timer 3 interrupts are enabled and TF3LEN (TMR3CN.5) is set, an interrupt is generated each
time either TMR3L or TMR3H overflows. When TF3LEN is enabled, software must check the TF3H and
TF3L flags to determine the source of the Timer 3 interrupt. The TF3H and TF3L interrupt flags are not
cleared by hardware and must be manually cleared by software.
250
External Clock / 8
T3MH
SYSCLK / 12
0
0
1
T3XCLK
T3XCLK
X
0
1
0
1
Figure 21.9. Timer 3 8-Bit Mode Block Diagram
TMR3H Clock Source
SYSCLK
External Clock / 8
SYSCLK / 12
SYSCLK
0
1
1
0
M
H
T
3
M
T
3
L
CKCON
M
H
T
2
M
T
2
L
TR3
M
T
1
M
T
0
S
C
A
1
S
C
A
0
Rev. 1.3
TCLK
TCLK
TMR3RLH
TMR3RLL
TMR3H
TMR3L
T3ML
0
0
1
Reload
Reload
T3XCLK
X
0
1
To ADC
T3SPLIT
TF3LEN
T3XCLK
T3CSS
TF3H
T3CE
TF3L
TR3
TMR3L Clock Source
External Clock / 8
SYSCLK / 12
SYSCLK
Interrupt